2 * This file is part of the coreboot project.
4 * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
19 #include <device/pci_def.h>
21 #include <device/pnp_def.h>
22 #include <console/console.h>
23 #include <southbridge/intel/i82371eb/i82371eb.h>
24 #include <northbridge/intel/i440bx/raminit.h>
25 #include "drivers/pc80/udelay_io.c"
27 #include <cpu/x86/bist.h>
28 #include <superio/winbond/common/winbond.h>
29 #include <superio/winbond/w83977tf/w83977tf.h>
32 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
34 int spd_read_byte(unsigned int device
, unsigned int address
)
36 return smbus_read_byte(device
, address
);
39 #include <cpu/intel/romstage.h>
40 void main(unsigned long bist
)
42 winbond_enable_serial(SERIAL_DEV
, CONFIG_TTYS0_BASE
);
44 report_bist_failure(bist
);
48 sdram_set_registers();
49 sdram_set_spd_registers();