tree: drop last paragraph of GPL copyright header
[coreboot.git] / src / mainboard / lenovo / t420s / dsdt.asl
blob827a2eadb2e0eb31e4f43b3f77eca28cd55452f9
1 /*
2  * This file is part of the coreboot project.
3  *
4  * Copyright (C) 2007-2009 coresystems GmbH
5  * Copyright (C) 2011 The ChromiumOS Authors.  All rights reserved.
6  * Copyright (C) 2014 Vladimir Serbinenko
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; version 2 of the License.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  */
18 #define THINKPAD_EC_GPE 17
19 #define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
20 #define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
21 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
22 #define EC_LENOVO_H8_ME_WORKAROUND 1
23 #define HAVE_LCD_SCREEN 1
25 DefinitionBlock(
26         "dsdt.aml",
27         "DSDT",
28         0x02,           // DSDT revision: ACPI v2.0
29         "COREv4",       // OEM id
30         "COREBOOT",     // OEM table id
31         0x20110725      // OEM revision
34         #include <southbridge/intel/bd82x6x/acpi/platform.asl>
36         // Some generic macros
37         #include "acpi/platform.asl"
39         // global NVS and variables
40         #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
42         #include <cpu/intel/model_206ax/acpi/cpu.asl>
44         Scope (\_SB) {
45                 Device (PCI0)
46                 {
47                         #include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
48                         #include <southbridge/intel/bd82x6x/acpi/pch.asl>
49                         #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl>
51                         #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
52                 }
53         }
55         /*
56          * LPC Trusted Platform Module
57          */
58         Scope (\_SB.PCI0.LPCB)
59         {
60                 #include <drivers/pc80/tpm/acpi/tpm.asl>
61         }
63         /* Chipset specific sleep states */
64         #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>