tree: drop last paragraph of GPL copyright header
[coreboot.git] / src / mainboard / kontron / kt690 / get_bus_conf.c
blobdc6833a05fed275cb809d628939e9e159d2d730c
1 /*
2 * This file is part of the coreboot project.
4 * Copyright (C) 2008 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <console/console.h>
17 #include <device/pci.h>
18 #include <device/pci_ids.h>
19 #include <string.h>
20 #include <stdint.h>
21 #include <stdlib.h>
22 #include <cpu/amd/multicore.h>
24 #include <cpu/amd/amdk8_sysconf.h>
26 /* Global variables for MB layouts and these will be shared by irqtable mptable
27 * and acpi_tables busnum is default.
29 u8 bus_rs690[8];
30 u8 bus_sb600[2];
31 u32 apicid_sb600;
34 * Here you only need to set value in pci1234 for HT-IO that could be installed or not
35 * You may need to preset pci1234 for HTIO board,
36 * please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
38 u32 pci1234x[] = {
39 0x0000ff0,
43 * HT Chain device num, actually it is unit id base of every ht device in chain,
44 * assume every chain only have 4 ht device at most
46 u32 hcdnx[] = {
47 0x20202020,
50 u32 sbdn_rs690;
51 u32 sbdn_sb600;
55 static u32 get_bus_conf_done = 0;
57 void get_bus_conf(void)
59 u32 apicid_base;
60 device_t dev;
61 int i;
63 if (get_bus_conf_done == 1)
64 return; /* do it only once */
65 get_bus_conf_done = 1;
67 sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
68 for (i = 0; i < sysconf.hc_possible_num; i++) {
69 sysconf.pci1234[i] = pci1234x[i];
70 sysconf.hcdn[i] = hcdnx[i];
73 get_sblk_pci1234();
75 sysconf.sbdn = (sysconf.hcdn[0] & 0xff);
76 sbdn_rs690 = sysconf.sbdn;
77 sbdn_sb600 = 0;
79 for (i = 0; i < 2; i++) {
80 bus_sb600[i] = 0;
82 for (i = 0; i < 8; i++) {
83 bus_rs690[i] = 0;
86 bus_rs690[0] = (sysconf.pci1234[0] >> 16) & 0xff;
87 bus_sb600[0] = bus_rs690[0];
89 /* sb600 */
90 dev = dev_find_slot(bus_sb600[0], PCI_DEVFN(sbdn_sb600 + 0x14, 4));
91 if (dev) {
92 bus_sb600[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
95 /* rs690 */
96 for (i = 1; i < 8; i++) {
97 dev = dev_find_slot(bus_rs690[0], PCI_DEVFN(sbdn_rs690 + i, 0));
98 if (dev) {
99 bus_rs690[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
103 /* I/O APICs: APIC ID Version State Address */
104 if (IS_ENABLED(CONFIG_LOGICAL_CPUS))
105 apicid_base = get_apicid_base(1);
106 else
107 apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
108 apicid_sb600 = apicid_base + 0;