2 * This file is part of the coreboot project.
4 * Copyright (C) 2007-2009 coresystems GmbH
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
18 #include <console/console.h>
19 #include <arch/acpi.h>
20 #include <arch/ioapic.h>
21 #include <arch/acpigen.h>
22 #include <arch/smp/mpspec.h>
23 #include <device/device.h>
24 #include <device/pci.h>
25 #include <device/pci_ids.h>
26 #include <cpu/x86/msr.h>
28 #include "southbridge/intel/i82801gx/nvs.h"
29 void acpi_create_gnvs(global_nvs_t
*gnvs
)
31 /* Enable both COM ports */
37 unsigned long acpi_fill_madt(unsigned long current
)
40 current
= acpi_create_madt_lapics(current
);
43 current
+= acpi_create_madt_ioapic((acpi_madt_ioapic_t
*) current
,
47 current
+= acpi_create_madt_irqoverride((acpi_madt_irqoverride_t
*)
49 current
+= acpi_create_madt_irqoverride((acpi_madt_irqoverride_t
*)
50 current
, 0, 9, 9, MP_IRQ_TRIGGER_LEVEL
| MP_IRQ_POLARITY_HIGH
);