tree: drop last paragraph of GPL copyright header
[coreboot.git] / src / mainboard / intel / strago / onboard.h
blob89c9b698ff3342055bb769bd429b67a11ab0f676
1 /*
2 * This file is part of the coreboot project.
4 * Copyright (C) 2013 Google Inc.
5 * Copyright (C) 2015 Intel Corp.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #ifndef ONBOARD_H
18 #define ONBOARD_H
20 #include "irqroute.h"
23 * Calculation of gpio based irq.
24 * Gpio banks ordering : GPSW, GPNC, GPEC, GPSE
25 * Max direct irq (MAX_DIRECT_IRQ) is 114.
26 * Size of gpio banks are
27 * GPSW_SIZE = 98
28 * GPNC_SIZE = 73
29 * GPEC_SIZE = 27
30 * GPSE_SIZE = 86
34 * gpio based irq for kbd, 17th index in North Bank
35 * MAX_DIRECT_IRQ + GPSW_SIZE + 18
37 /* ToDo: change kbd irq to gpio bank index */
38 #define BOARD_I8042_IRQ 182
40 #define BOARD_TOUCH_IRQ 156
41 #define BOARD_DVT_TOUCH_IRQ 184
44 /* Audio: Gpio index in SW bank */
45 #define JACK_DETECT_GPIO_INDEX 95
46 /* SCI: Gpio index in N bank */
47 #define BOARD_SCI_GPIO_INDEX 15
48 /* Trackpad: Gpio index in N bank */
49 #define BOARD_TRACKPAD_GPIO_INDEX 18
51 #define BOARD_TRACKPAD_NAME "trackpad"
52 #define BOARD_TRACKPAD_WAKE_GPIO ACPI_ENABLE_WAKE_SUS_GPIO(1)
53 #define BOARD_TRACKPAD_I2C_BUS 5
54 #define BOARD_TRACKPAD_I2C_ADDR 0x15
56 #define BOARD_TOUCHSCREEN_NAME "touchscreen"
57 #define BOARD_TOUCHSCREEN_WAKE_GPIO ACPI_ENABLE_WAKE_SUS_GPIO(2)
58 #define BOARD_TOUCHSCREEN_I2C_BUS 0
59 #define BOARD_TOUCHSCREEN_I2C_ADDR 0x4a /* TODO(shawnn): Check this */
63 /* SD CARD gpio */
64 #define SDCARD_CD 81
66 #define AUDIO_CODEC_HID "10EC5650"
67 #define AUDIO_CODEC_CID "10EC5650"
68 #define AUDIO_CODEC_DDN "RTEK Codec Controller "
69 #define AUDIO_CODEC_I2C_ADDR 0x1A
71 #define BOARD_EVT 0x02
72 #define BOARD_DVT 0x03
73 #define BOARD_BCRD2 0x04
75 #define BCRD2_PMIC_I2C_BUS 0x01
77 #endif