2 * This file is part of the coreboot project.
4 * Copyright (C) 2008-2009 coresystems GmbH
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
17 #include <console/console.h>
18 #include <cpu/x86/smm.h>
19 #include <southbridge/intel/bd82x6x/nvs.h>
20 #include <southbridge/intel/bd82x6x/pch.h>
21 #include <southbridge/intel/bd82x6x/me.h>
22 #include <northbridge/intel/sandybridge/sandybridge.h>
23 #include <cpu/intel/model_206ax/model_206ax.h>
26 * Change LED_POWER# (SIO GPIO 45) state based on sleep type.
27 * The IO address is hardcoded as we don't have device path in SMM.
29 #define SIO_GPIO_BASE_SET4 (0x730 + 3)
30 #define SIO_GPIO_BLINK_GPIO45 0x25
31 void mainboard_smi_sleep(u8 slp_typ
)
42 reg8
= inb(SIO_GPIO_BASE_SET4
);
44 outb(reg8
, SIO_GPIO_BASE_SET4
);