src/mainboard/intel/d810e2cb/irq_tables.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2010 Joseph Smith <joe@settoplinux.org>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <arch/pirq_routing.h>
  18
  19 static const struct irq_routing_table intel_irq_routing_table = {
  20         PIRQ_SIGNATURE,         /* u32 signature */
  21         PIRQ_VERSION,           /* u16 version */
  22         32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* Max. number of devices on the bus (7)*/
  23         0x00,                   /* Interrupt router bus */
  24         (0x1f << 3) | 0x0,      /* Interrupt router dev */
  25         0,                      /* IRQs devoted exclusively to PCI usage */
  26         0x8086,                 /* Vendor */
  27         0x2440,                 /* Device */
  28         0,                      /* Miniport */
  29         { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
  30         0xd9,                   /* Checksum (has to be set to some value that
  31                                  * would give 0 after the sum of all bytes
  32                                  * for this structure (including checksum).
  33                                  */
  34         {
  35                 /* bus,        dev | fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
  36                 {0x00, (0x00 << 3) | 0x0, {{0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
  37                 {0x00, (0x01 << 3) | 0x0, {{0x60, 0xdeb8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
  38                 {0x00, (0x1e << 3) | 0x0, {{0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
  39                 {0x00, (0x1f << 3) | 0x0, {{0x60, 0xdef8}, {0x61, 0xdef8}, {0x6b, 0xdef8}, {0x63, 0xdef8}}, 0x0, 0x0},
  40                 {0x01, (0x01 << 3) | 0x0, {{0x62, 0xdef8}, {0x63, 0xdef8}, {0x60, 0xdef8}, {0x61, 0xdef8}}, 0x1, 0x0},
  41                 {0x01, (0x02 << 3) | 0x0, {{0x63, 0xdef8}, {0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0xdef8}}, 0x2, 0x0},
  42                 {0x01, (0x08 << 3) | 0x0, {{0x68, 0xdef8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
  43         }
  44 };
  45
  46 unsigned long write_pirq_routing_table(unsigned long addr)
  47 {
  48         return copy_pirq_routing_table(addr, &intel_irq_routing_table);
  49 }