tree: drop last paragraph of GPL copyright header
[coreboot.git] / src / mainboard / intel / cougar_canyon2 / mainboard_smi.c
blobdb9d198ad4f943d260edc03039c1a38c5ff38760
1 /*
2 * This file is part of the coreboot project.
4 * Copyright (C) 2008-2009 coresystems GmbH
5 * Copyright (C) 2013 Sage Electronic Engineering, LLC.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include <arch/io.h>
18 #include <console/console.h>
19 #include <cpu/x86/smm.h>
20 #include <southbridge/intel/fsp_bd82x6x/nvs.h>
21 #include <southbridge/intel/fsp_bd82x6x/pch.h>
22 #include <southbridge/intel/fsp_bd82x6x/me.h>
23 #include <northbridge/intel/fsp_sandybridge/sandybridge.h>
24 #include <cpu/intel/fsp_model_206ax/model_206ax.h>
27 * Change LED_POWER# (SIO GPIO 45) state based on sleep type.
28 * The IO address is hardcoded as we don't have device path in SMM.
30 #define SIO_GPIO_BASE_SET4 (0x730 + 3)
31 #define SIO_GPIO_BLINK_GPIO45 0x25
32 void mainboard_smi_sleep(u8 slp_typ)
34 u8 reg8;
36 switch (slp_typ) {
37 case SLP_TYP_S3:
38 case SLP_TYP_S4:
39 break;
41 case SLP_TYP_S5:
42 /* Turn off LED */
43 reg8 = inb(SIO_GPIO_BASE_SET4);
44 reg8 |= (1 << 5);
45 outb(reg8, SIO_GPIO_BASE_SET4);
46 break;
51 static int mainboard_finalized = 0;
53 int mainboard_smi_apmc(u8 apmc)
55 switch (apmc) {
56 case APM_CNT_FINALIZE:
57 if (mainboard_finalized) {
58 printk(BIOS_DEBUG, "SMI#: Already finalized\n");
59 return 0;
62 intel_me_finalize_smm();
63 intel_pch_finalize_smm();
64 intel_sandybridge_finalize_smm();
65 intel_model_206ax_finalize_smm();
67 mainboard_finalized = 1;
68 break;
70 return 0;