2 * This file is part of the coreboot project.
4 * Copyright (C) 2014 Google Inc.
5 * Copyright (C) 2015 Intel Corporation.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include <arch/byteorder.h>
20 #include <console/console.h>
21 #include <soc/pei_data.h>
22 #include <soc/romstage.h>
25 #include "../boardid.h"
28 static void mainboard_print_spd_info(uint8_t spd
[])
30 const int spd_banks
[8] = { 8, 16, 32, 64, -1, -1, -1, -1 };
31 const int spd_capmb
[8] = { 1, 2, 4, 8, 16, 32, 64, 0 };
32 const int spd_rows
[8] = { 12, 13, 14, 15, 16, -1, -1, -1 };
33 const int spd_cols
[8] = { 9, 10, 11, 12, -1, -1, -1, -1 };
34 const int spd_ranks
[8] = { 1, 2, 3, 4, -1, -1, -1, -1 };
35 const int spd_devw
[8] = { 4, 8, 16, 32, -1, -1, -1, -1 };
36 const int spd_busw
[8] = { 8, 16, 32, 64, -1, -1, -1, -1 };
37 char spd_name
[SPD_PART_LEN
+1] = { 0 };
39 int banks
= spd_banks
[(spd
[SPD_DENSITY_BANKS
] >> 4) & 7];
40 int capmb
= spd_capmb
[spd
[SPD_DENSITY_BANKS
] & 7] * 256;
41 int rows
= spd_rows
[(spd
[SPD_ADDRESSING
] >> 3) & 7];
42 int cols
= spd_cols
[spd
[SPD_ADDRESSING
] & 7];
43 int ranks
= spd_ranks
[(spd
[SPD_ORGANIZATION
] >> 3) & 7];
44 int devw
= spd_devw
[spd
[SPD_ORGANIZATION
] & 7];
45 int busw
= spd_busw
[spd
[SPD_BUS_DEV_WIDTH
] & 7];
48 printk(BIOS_INFO
, "SPD: module type is ");
49 switch (spd
[SPD_DRAM_TYPE
]) {
51 printk(BIOS_INFO
, "DDR3\n");
54 printk(BIOS_INFO
, "LPDDR3\n");
57 printk(BIOS_INFO
, "Unknown (%02x)\n", spd
[SPD_DRAM_TYPE
]);
61 /* Module Part Number */
62 memcpy(spd_name
, &spd
[SPD_PART_OFF
], SPD_PART_LEN
);
63 spd_name
[SPD_PART_LEN
] = 0;
64 printk(BIOS_INFO
, "SPD: module part is %s\n", spd_name
);
67 "SPD: banks %d, ranks %d, rows %d, columns %d, density %d Mb\n",
68 banks
, ranks
, rows
, cols
, capmb
);
69 printk(BIOS_INFO
, "SPD: device width %d bits, bus width %d bits\n",
72 if (capmb
> 0 && busw
> 0 && devw
> 0 && ranks
> 0) {
73 /* SIZE = DENSITY / 8 * BUS_WIDTH / SDRAM_WIDTH * RANKS */
74 printk(BIOS_INFO
, "SPD: module size is %u MB (per channel)\n",
75 capmb
/ 8 * busw
/ devw
* ranks
);
79 /* Copy SPD data for on-board memory */
80 void mainboard_fill_spd_data(struct pei_data
*pei_data
)
84 int spd_index
, sku_id
;
87 spd_index
= pei_data
->mem_cfg_id
;
89 * XXX: This is incorrect usage.The Board ID should be the revision ID
90 * and not SKU ID but on SCRD it indicates SKU.
93 printk(BIOS_INFO
, "SPD index %d\n", spd_index
);
94 printk(BIOS_INFO
, "Board ID %d\n", sku_id
);
96 /* Load SPD data from CBFS */
97 spd_file
= cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD
,
100 die("SPD data not found.");
102 /* make sure we have at least one SPD in the file. */
103 if (spd_file_len
< SPD_LEN
)
104 die("Missing SPD data.");
106 /* Make sure we did not overrun the buffer */
107 if (spd_file_len
< ((spd_index
+ 1) * SPD_LEN
)) {
108 printk(BIOS_ERR
, "SPD index override to 0 - old hardware?\n");
112 /* Assume same memory in both channels */
113 spd_index
*= SPD_LEN
;
114 memcpy(pei_data
->spd_data
[0][0], spd_file
+ spd_index
, SPD_LEN
);
116 * XXX: This is incorrect usage. mem_cfg should be used here instead of
117 * SKU ID. The current implementation of mem_config does not
118 * support channel population.
121 if (sku_id
!= SCRD_SKU1
)
122 memcpy(pei_data
->spd_data
[1][0], spd_file
+ spd_index
, SPD_LEN
);
124 /* Make sure a valid SPD was found */
125 if (pei_data
->spd_data
[0][0][0] == 0)
126 die("Invalid SPD data.");
128 mainboard_print_spd_info(pei_data
->spd_data
[0][0]);