2 * This file is part of the coreboot project.
4 * Copyright (C) 2014 Google Inc.
5 * Copyright (C) 2015 Intel Corporation.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #define DPTF_CPU_PASSIVE 80
18 #define DPTF_CPU_CRITICAL 90
19 #define DPTF_CPU_ACTIVE_AC0 90
20 #define DPTF_CPU_ACTIVE_AC1 80
21 #define DPTF_CPU_ACTIVE_AC2 70
22 #define DPTF_CPU_ACTIVE_AC3 60
23 #define DPTF_CPU_ACTIVE_AC4 50
25 #define DPTF_TSR0_SENSOR_ID 0
26 #define DPTF_TSR0_SENSOR_NAME "TMP432_Internal"
27 #define DPTF_TSR0_PASSIVE 48
28 #define DPTF_TSR0_CRITICAL 70
30 #define DPTF_TSR1_SENSOR_ID 1
31 #define DPTF_TSR1_SENSOR_NAME "TMP432_Power_top"
32 #define DPTF_TSR1_PASSIVE 60
33 #define DPTF_TSR1_CRITICAL 70
35 #define DPTF_TSR2_SENSOR_ID 2
36 #define DPTF_TSR2_SENSOR_NAME "TMP432_CPU_bottom"
37 #define DPTF_TSR2_PASSIVE 55
38 #define DPTF_TSR2_CRITICAL 70
40 #define DPTF_ENABLE_CHARGER
42 /* Charger performance states, board-specific values from charger and EC */
43 Name (CHPS, Package () {
44 Package () { 0, 0, 0, 0, 255, 0x6a4, "mA", 0 }, /* 1.7A (MAX) */
45 Package () { 0, 0, 0, 0, 24, 0x600, "mA", 0 }, /* 1.5A */
46 Package () { 0, 0, 0, 0, 16, 0x400, "mA", 0 }, /* 1.0A */
47 Package () { 0, 0, 0, 0, 8, 0x200, "mA", 0 }, /* 0.5A */
48 Package () { 0, 0, 0, 0, 0, 0x000, "mA", 0 }, /* 0.0A */
51 Name (DTRT, Package () {
52 /* CPU Throttle Effect on CPU */
53 Package () { \_SB.PCI0.B0D4, \_SB.PCI0.B0D4, 100, 50, 0, 0, 0, 0 },
55 /* CPU Effect on Temp Sensor 0 */
56 Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 },
58 #ifdef DPTF_ENABLE_CHARGER
59 /* Charger Effect on Temp Sensor 1 */
60 Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR1, 200, 600, 0, 0, 0, 0 },
63 /* CPU Effect on Temp Sensor 1 */
64 Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR1, 100, 600, 0, 0, 0, 0 },
66 /* CPU Effect on Temp Sensor 2 */
67 Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR2, 100, 600, 0, 0, 0, 0 },
70 Name (MPPC, Package ()
73 Package () { /* Power Limit 1 */
74 0, /* PowerLimitIndex, 0 for Power Limit 1 */
75 1600, /* PowerLimitMinimum */
76 6000, /* PowerLimitMaximum */
77 1000, /* TimeWindowMinimum */
78 1000, /* TimeWindowMaximum */
81 Package () { /* Power Limit 2 */
82 1, /* PowerLimitIndex, 1 for Power Limit 2 */
83 8000, /* PowerLimitMinimum */
84 8000, /* PowerLimitMaximum */
85 1000, /* TimeWindowMinimum */
86 1000, /* TimeWindowMaximum */
92 #include <soc/intel/skylake/acpi/dptf/dptf.asl>