src/mainboard/google/falco/acpi_tables.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2012 Google Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <types.h>
  17 #include <string.h>
  18 #include <cbmem.h>
  19 #include <console/console.h>
  20 #include <arch/acpi.h>
  21 #include <arch/ioapic.h>
  22 #include <arch/acpigen.h>
  23 #include <arch/smp/mpspec.h>
  24 #include <device/device.h>
  25 #include <device/pci.h>
  26 #include <device/pci_ids.h>
  27 #include <cpu/cpu.h>
  28 #include <cpu/x86/msr.h>
  29 #include <vendorcode/google/chromeos/gnvs.h>
  30 #include <ec/google/chromeec/ec.h>
  31
  32 #include <southbridge/intel/lynxpoint/pch.h>
  33 #include <southbridge/intel/lynxpoint/nvs.h>
  34 #include "thermal.h"
  35
  36 static void acpi_update_thermal_table(global_nvs_t *gnvs)
  37 {
  38         gnvs->tmps = TEMPERATURE_SENSOR_ID;
  39         gnvs->tcrt = CRITICAL_TEMPERATURE;
  40         gnvs->tpsv = PASSIVE_TEMPERATURE;
  41         gnvs->tmax = MAX_TEMPERATURE;
  42         gnvs->f0pw = EC_THROTTLE_POWER_LIMIT;
  43         gnvs->flvl = 1;
  44 }
  45
  46 void acpi_create_gnvs(global_nvs_t *gnvs)
  47 {
  48         /* Enable USB ports in S3 */
  49         gnvs->s3u0 = 1;
  50         gnvs->s3u1 = 1;
  51
  52         /* Disable USB ports in S5 */
  53         gnvs->s5u0 = 0;
  54         gnvs->s5u1 = 0;
  55
  56         /* TPM Present */
  57         gnvs->tpmp = 1;
  58
  59
  60 #if CONFIG_CHROMEOS
  61         gnvs->chromeos.vbt2 = google_ec_running_ro() ?
  62                 ACTIVE_ECFW_RO : ACTIVE_ECFW_RW;
  63 #endif
  64
  65         acpi_update_thermal_table(gnvs);
  66 }
  67
  68 unsigned long acpi_fill_madt(unsigned long current)
  69 {
  70         /* Local APICs */
  71         current = acpi_create_madt_lapics(current);
  72
  73         /* IOAPIC */
  74         current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
  75                                 2, IO_APIC_ADDR, 0);
  76
  77         /* INT_SRC_OVR */
  78         current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
  79                  current, 0, 0, 2, 0);
  80         current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
  81                  current, 0, 9, 9, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH);
  82
  83         return current;
  84 }