src/mainboard/google/cyan/w25q64.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2014 Google Inc.
   5  * Copyright (C) 2015 Intel Corp.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <soc/spi.h>
  18 #include <string.h>
  19
  20 /*
  21  * SPI lockdown configuration W25Q64FW.
  22  */
  23 #define SPI_OPMENU_0 0x01 /* WRSR: Write Status Register */
  24 #define SPI_OPTYPE_0 0x01 /* Write, no address */
  25
  26 #define SPI_OPMENU_1 0x02 /* BYPR: Byte Program */
  27 #define SPI_OPTYPE_1 0x03 /* Write, address required */
  28
  29 #define SPI_OPMENU_2 0x03 /* READ: Read Data */
  30 #define SPI_OPTYPE_2 0x02 /* Read, address required */
  31
  32 #define SPI_OPMENU_3 0x05 /* RDSR: Read Status Register */
  33 #define SPI_OPTYPE_3 0x00 /* Read, no address */
  34
  35 #define SPI_OPMENU_4 0x20 /* SE20: Sector Erase 0x20 */
  36 #define SPI_OPTYPE_4 0x03 /* Write, address required */
  37
  38 #define SPI_OPMENU_5 0x9f /* RDID: Read ID */
  39 #define SPI_OPTYPE_5 0x00 /* Read, no address */
  40
  41 #define SPI_OPMENU_6 0xd8 /* BED8: Block Erase 0xd8 */
  42 #define SPI_OPTYPE_6 0x03 /* Write, address required */
  43
  44 #define SPI_OPMENU_7 0x0b /* FAST: Fast Read */
  45 #define SPI_OPTYPE_7 0x02 /* Read, address required */
  46
  47 #define SPI_OPPREFIX ((0x50 << 8) | 0x06) /* EWSR and WREN */
  48 #define SPI_OPTYPE ((SPI_OPTYPE_7 << 14) | (SPI_OPTYPE_6 << 12) | \
  49                     (SPI_OPTYPE_5 << 10) | (SPI_OPTYPE_4 <<  8) | \
  50                     (SPI_OPTYPE_3 <<  6) | (SPI_OPTYPE_2 <<  4) | \
  51                     (SPI_OPTYPE_1 <<  2) | (SPI_OPTYPE_0 <<  0))
  52 #define SPI_OPMENU_UPPER ((SPI_OPMENU_7 << 24) | (SPI_OPMENU_6 << 16) | \
  53                           (SPI_OPMENU_5 <<  8) | (SPI_OPMENU_4 <<  0))
  54 #define SPI_OPMENU_LOWER ((SPI_OPMENU_3 << 24) | (SPI_OPMENU_2 << 16) | \
  55                           (SPI_OPMENU_1 <<  8) | (SPI_OPMENU_0 <<  0))
  56 #define SPI_VSCC (WG_64_BYTE | EO(0x20) | BES_4_KB)
  57
  58 static const struct spi_config spi_config = {
  59         .preop = SPI_OPPREFIX,
  60         .optype = SPI_OPTYPE,
  61         .opmenu = { SPI_OPMENU_LOWER, SPI_OPMENU_UPPER },
  62         .lvscc =  SPI_VSCC,
  63         .uvscc =  SPI_VSCC,
  64 };
  65
  66 int mainboard_get_spi_config(struct spi_config *cfg)
  67 {
  68         memcpy(cfg, &spi_config, sizeof(*cfg));
  69
  70         return 0;
  71 }