2 ## This file is part of the coreboot project.
4 ## Copyright
(C
) 2007-2009 coresystems GmbH
6 ## This program is free software
; you can redistribute it
and/or
7 ## modify it under the terms of the GNU General Public License
as
8 ## published by the Free Software Foundation
; version
2 of
11 ## This program is distributed in the hope that it will be useful
,
12 ## but WITHOUT ANY WARRANTY
; without even the implied warranty of
13 ## MERCHANTABILITY
or FITNESS
FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License
for more details.
17 chip northbridge
/intel
/i945
19 register
"gfx.ndid" = "2"
20 register
"gfx.did" = "{ 0x80000100, 0x80000410, 0x80000320, 0x80000410, 0x00000005 }"
22 device cpu_cluster
0 on
23 chip cpu
/intel
/socket_mFCPGA478
29 device pci
00.0 on
end # host bridge
30 device pci
01.0 off
end # i945 PCIe root port
31 device pci
02.0 on
end # vga controller
32 device pci
02.1 on
end # display controller
34 chip southbridge
/intel
/i82801gx
35 register
"pirqa_routing" = "0x0a"
36 register
"pirqb_routing" = "0x0a"
37 register
"pirqc_routing" = "0x0a"
38 register
"pirqd_routing" = "0x0a"
39 register
"pirqe_routing" = "0x80"
40 register
"pirqf_routing" = "0x80"
41 register
"pirqg_routing" = "0x0a"
42 register
"pirqh_routing" = "0x0a"
45 #
0 No effect
(default
)
46 #
1 SMI#
(if corresponding ALT_GPI_SMI_EN bit is also
set)
47 #
2 SCI
(if corresponding GPIO_EN bit is also
set)
48 register
"gpi8_routing" = "1" # EXTSMI low active
49 register
"gpi7_routing" = "2" # ECSCI low active
52 register
"gpe0_en" = "0x00800106"
53 register
"alt_gp_smi_en" = "0x0100"
55 register
"ide_legacy_combined" = "0x1"
56 register
"ide_enable_primary" = "0x1"
57 register
"ide_enable_secondary" = "0x0"
58 register
"sata_ahci" = "0x0"
60 register
"c3_latency" = "85"
61 register
"docking_supported" = "1"
62 register
"p_cnt_throttling_supported" = "1"
64 device pci
1b
.0 on
end # High Definition Audio
65 device pci
1c
.0 on
end # PCIe port
1
66 device pci
1c
.1 on
end # PCIe port
2
67 device pci
1c
.2 on
end # PCIe port
3
68 device pci
1c
.3 on
end # PCIe port
4
69 #device pci
1c
.4 off
end # PCIe port
5
70 #device pci
1c
.5 off
end # PCIe port
6
71 device pci
1d
.0 on
end # USB UHCI
72 device pci
1d
.1 on
end # USB UHCI
73 device pci
1d
.2 on
end # USB UHCI
74 device pci
1d
.3 on
end # USB UHCI
75 device pci
1d
.7 on
end # USB2 EHCI
77 chip southbridge
/ti
/pcixx12
81 #device pci
1e
.2 off
end # AC
'97 Audio
82 #device pci
1e
.3 off
end # AC
'97 Modem
83 device pci
1f
.0 on # LPC bridge
84 chip superio
/smsc
/fdc37n972
85 device pnp
2e
.0 off # Floppy
87 device pnp
2e
.1 off # ACPI PM
90 device pnp
2e
.3 on # Parallel port
94 device pnp
2e
.4 on # COM1
100 #device pnp
2e
.6 on # RTC
104 device pnp
2e
.7 off # Keyboard
106 device pnp
2e
.8 off # EC
109 #device pnp
2e
.9 on # Mailbox
112 chip superio
/smsc
/sio10n268
113 device pnp
4e
.0 off # Floppy
115 device pnp
4e
.1 off # Parport
117 #device pnp
4e
.2 on # COM3
121 #device pnp
4e
.3 on # COM4
125 device pnp
4e
.5 on # Keyboard
129 device pnp
4e
.7 off # GPIO1
, GAME
, MIDI
131 device pnp
4e
.8 off # GPIO2
133 device pnp
4e
.9 off # GPIO3
/4
135 device pnp
4e.a off # ACPI
137 device pnp
4e.b off # HWM
144 device pci
1f
.1 on
end # IDE
145 device pci
1f
.2 on
end # SATA
146 device pci
1f
.3 on
end # SMBus