src/mainboard/asus/kgpe-d16/dsdt.asl

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
   5  * Copyright (C) 2005 - 2012 Advanced Micro Devices, Inc.
   6  * Copyright (C) 2007-2009 coresystems GmbH
   7  * Copyright (C) 2004 Nick Barker <Nick.Barker9@btinternet.com>
   8  * Copyright (C) 2007, 2008 Rudolf Marek <r.marek@assembler.cz>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; version 2 of the License.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  */
  19
  20 /*
  21  * WARNING: Sleep/Wake is a work in progress and is still somewhat flaky!
  22  * Everything else does to the best of my knowledge... (T.P. 01/26/2015)
  23  */
  24
  25 /*
  26  * ISA portions taken from QEMU acpi-dsdt.dsl.
  27  */
  28
  29 /*
  30  * PCI link routing templates taken from ck804.asl and modified for this board
  31  */
  32
  33 DefinitionBlock (
  34         "DSDT.AML",     /* Output filename */
  35         "DSDT",         /* Signature */
  36         0x02,           /* DSDT Revision, needs to be 2 for 64bit */
  37         "ASUS  ",       /* OEMID */
  38         "COREBOOT",     /* TABLE ID */
  39         0x00000001      /* OEM Revision */
  40         )
  41 {
  42         #include "northbridge/amd/amdfam10/amdfam10_util.asl"
  43         #include "southbridge/amd/sr5650/acpi/sr5650.asl"
  44
  45         /* Some global data */
  46         Name(OSVR, 3)   /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
  47         Name(OSV, Ones) /* Assume nothing */
  48         Name(PICM, One) /* Assume APIC */
  49
  50         /* HPET control */
  51         Name (SHPB, 0xFED00000)
  52         Name (SHPL, 0x1000)
  53
  54         /* Define power states */
  55         Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 })      /* Normal operation */
  56         Name (\_S1, Package () { 0x01, 0x01, 0x00, 0x00 })      /* Standby */
  57         Name (\_S2, Package () { 0x02, 0x02, 0x00, 0x00 })      /* Standby w/ CPU shutdown */
  58         Name (\_S3, Package () { 0x03, 0x00, 0x00, 0x00 })      /* Suspend */
  59         /* Name (\_S4, Package () { 0x04, 0x04, 0x00, 0x00 }) */
  60         Name (\_S5, Package () { 0x05, 0x05, 0x00, 0x00 })      /* Hard power off */
  61
  62         /* The _PIC method is called by the OS to choose between interrupt
  63                 * routing via the i8259 interrupt controller or the APIC.
  64                 *
  65                 * _PIC is called with a parameter of 0 for i8259 configuration and
  66                 * with a parameter of 1 for Local Apic/IOAPIC configuration.
  67                 */
  68         Method (_PIC, 1, Serialized) {
  69                 If (Arg0)
  70                 {
  71                         \_SB.CIRQ()
  72                 }
  73                 Store (Arg0, PICM)
  74         }
  75
  76         /* _PR CPU0 is dynamically supplied by SSDT */
  77         /* CPU objects and _PSS entries are dynamically supplied by SSDT */
  78
  79         Scope(\_GPE) {  /* Start Scope GPE */
  80                 /*  General event 3  */
  81                 Method(_L03) {
  82                         /* Level-Triggered GPE */
  83                         Notify(\_SB.PWRB, 0x02)                 /* NOTIFY_DEVICE_WAKE */
  84                 }
  85
  86                 /*  General event 4  */
  87                 Method(_L04) {
  88                         /* Level-Triggered GPE */
  89                         Notify (\_SB.PCI0.PBR0, 0x02)           /* NOTIFY_DEVICE_WAKE */
  90                         Notify (\_SB.PWRB, 0x02)                /* NOTIFY_DEVICE_WAKE */
  91                 }
  92
  93                 /*  Keyboard controller PME#  */
  94                 Method(_L08) {
  95                         /* Level-Triggered GPE */
  96                         Notify(\_SB.PCI0.LPC.KBD, 0x02)         /* NOTIFY_DEVICE_WAKE */
  97                         Notify(\_SB.PCI0.LPC.MOU, 0x02)         /* NOTIFY_DEVICE_WAKE */
  98                         Notify(\_SB.PWRB, 0x02)                 /* NOTIFY_DEVICE_WAKE */
  99                 }
 100
 101                 /*  USB controller PME#  */
 102                 Method(_L0B) {
 103                         /* Level-Triggered GPE */
 104                         Notify (\_SB.PCI0.USB0, 0x02)           /* NOTIFY_DEVICE_WAKE */
 105                         Notify (\_SB.PCI0.USB1, 0x02)           /* NOTIFY_DEVICE_WAKE */
 106                         Notify (\_SB.PCI0.USB2, 0x02)           /* NOTIFY_DEVICE_WAKE */
 107                         Notify (\_SB.PCI0.USB3, 0x02)           /* NOTIFY_DEVICE_WAKE */
 108                         Notify (\_SB.PCI0.USB4, 0x02)           /* NOTIFY_DEVICE_WAKE */
 109                         Notify (\_SB.PCI0.USB5, 0x02)           /* NOTIFY_DEVICE_WAKE */
 110                         Notify (\_SB.PCI0.USB6, 0x02)           /* NOTIFY_DEVICE_WAKE */
 111                         Notify (\_SB.PWRB, 0x02)                /* NOTIFY_DEVICE_WAKE */
 112                 }
 113
 114                 /*  GPIO0 or GEvent8 event  */
 115                 Method(_L18) {
 116                         /* Level-Triggered GPE */
 117                         Notify (\_SB.PCI0.PCE1, 0x02)           /* NOTIFY_DEVICE_WAKE */
 118                         Notify (\_SB.PCI0.NICA, 0x02)           /* NOTIFY_DEVICE_WAKE */
 119                         Notify (\_SB.PCI0.NICB, 0x02)           /* NOTIFY_DEVICE_WAKE */
 120                         Notify (\_SB.PCI0.PCE4, 0x02)           /* NOTIFY_DEVICE_WAKE */
 121                         Notify (\_SB.PCI0.PCE5, 0x02)           /* NOTIFY_DEVICE_WAKE */
 122                         Notify (\_SB.PCI0.PCE3, 0x02)           /* NOTIFY_DEVICE_WAKE */
 123                 }
 124
 125         }       /* End Scope GPE */
 126
 127         /* Root of the bus hierarchy */
 128         Scope (\_SB)
 129         {
 130                 /* Top southbridge PCI device (SR5690) */
 131                 Device (PCI0)
 132                 {
 133                         /* BUS0 root bus */
 134
 135                         Name (_HID, EisaId ("PNP0A03"))
 136                         Name (_ADR, 0x00180001)
 137                         Name (_UID, 0x00)
 138
 139                         Name (HCIN, 0x00)  // HC1
 140
 141                         Method (_BBN, 0, NotSerialized)
 142                         {
 143                                 Return (GBUS (GHCN(HCIN), GHCL(HCIN)))
 144                         }
 145
 146                         /* Operating System Capabilities Method */
 147                         Method(_OSC,4)
 148                         {
 149                                 /* Let OS control everything */
 150                                 Return (Arg3)
 151                         }
 152
 153                         External (BUSN)
 154                         External (MMIO)
 155                         External (PCIO)
 156                         External (SBLK)
 157                         External (TOM1)
 158                         External (HCLK)
 159                         External (SBDN)
 160                         External (HCDN)
 161                         External (CBST)
 162
 163                         /* PCI Routing Tables */
 164                         Name (PR00, Package () {
 165                                 /* PIC */
 166                                 /* Top southbridge device (SR5690) */
 167                                 /* HT Link */
 168                                 Package (0x04) { 0x0000FFFF, 0x00, LNKA, 0x00 },
 169
 170                                 /* PCI-E Slot 1 (Bridge) */
 171                                 Package (0x04) { 0x0002FFFF, 0x00, LNKE, 0x00 },
 172
 173                                 /* NIC A (Bridge) */
 174                                 Package (0x04) { 0x0009FFFF, 0x00, LNKF, 0x00 },
 175
 176                                 /* NIC B (Bridge) */
 177                                 Package (0x04) { 0x000AFFFF, 0x00, LNKG, 0x00 },
 178
 179                                 /* PCI-E Slot 4 (Bridge) */
 180                                 Package (0x04) { 0x000BFFFF, 0x00, LNKG, 0x00 },
 181
 182                                 /* PCI-E Slot 5 (Bridge) */
 183                                 Package (0x04) { 0x000CFFFF, 0x00, LNKG, 0x00 },
 184
 185                                 /* PCI-E Slot 3 (Bridge) */
 186                                 Package (0x04) { 0x000DFFFF, 0x00, LNKG, 0x00 },
 187
 188                                 /* Bottom southbridge device (SP5100) */
 189                                 /* SATA 0 */
 190                                 Package (0x04) { 0x0011FFFF, 0x00, LNKG, 0x00 },
 191
 192                                 /* USB 0 */
 193                                 Package (0x04) { 0x0012FFFF, 0x00, LNKA, 0x00 },
 194                                 Package (0x04) { 0x0012FFFF, 0x01, LNKB, 0x00 },
 195                                 Package (0x04) { 0x0012FFFF, 0x02, LNKC, 0x00 },
 196                                 Package (0x04) { 0x0012FFFF, 0x03, LNKD, 0x00 },
 197
 198                                 /* USB 1 */
 199                                 Package (0x04) { 0x0013FFFF, 0x00, LNKC, 0x00 },
 200                                 Package (0x04) { 0x0013FFFF, 0x01, LNKD, 0x00 },
 201                                 Package (0x04) { 0x0013FFFF, 0x02, LNKA, 0x00 },
 202                                 Package (0x04) { 0x0013FFFF, 0x03, LNKB, 0x00 },
 203
 204                                 /* SMBUS / IDE / LPC / VGA / FireWire / PCI Slot 0 */
 205                                 Package (0x04) { 0x0014FFFF, 0x00, LNKA, 0x00 },
 206                                 Package (0x04) { 0x0014FFFF, 0x01, LNKB, 0x00 },
 207                                 Package (0x04) { 0x0014FFFF, 0x02, LNKC, 0x00 },
 208                                 Package (0x04) { 0x0014FFFF, 0x03, LNKD, 0x00 },
 209                         })
 210
 211                         Name (AR00, Package () {
 212                                 /* APIC */
 213                                 /* Top southbridge device (SR5690) */
 214                                 /* HT Link */
 215                                 Package (0x04) { 0x0000FFFF, 0x00, 0x00, 55 },
 216
 217                                 /* PCI-E Slot 1 (Bridge) */
 218                                 Package (0x04) { 0x0002FFFF, 0x00, 0x00, 52 },
 219
 220                                 /* NIC A (Bridge) */
 221                                 Package (0x04) { 0x0009FFFF, 0x00, 0x00, 53 },
 222
 223                                 /* NIC B (Bridge) */
 224                                 Package (0x04) { 0x000AFFFF, 0x00, 0x00, 54 },
 225
 226                                 /* PCI-E Slot 4 (Bridge) */
 227                                 Package (0x04) { 0x000BFFFF, 0x00, 0x00, 54 },
 228
 229                                 /* PCI-E Slot 5 (Bridge) */
 230                                 Package (0x04) { 0x000CFFFF, 0x00, 0x00, 54 },
 231
 232                                 /* PCI-E Slot 3 (Bridge) */
 233                                 Package (0x04) { 0x000DFFFF, 0x00, 0x00, 54 },
 234
 235                                 /* Bottom southbridge device (SP5100) */
 236                                 /* SATA 0 */
 237                                 Package (0x04) { 0x0011FFFF, 0x00, 0x00, 22 },
 238
 239                                 /* USB 0 */
 240                                 Package (0x04) { 0x0012FFFF, 0x00, 0x00, 16 },
 241                                 Package (0x04) { 0x0012FFFF, 0x01, 0x00, 17 },
 242                                 Package (0x04) { 0x0012FFFF, 0x02, 0x00, 18 },
 243                                 Package (0x04) { 0x0012FFFF, 0x03, 0x00, 19 },
 244
 245                                 /* USB 1 */
 246                                 Package (0x04) { 0x0013FFFF, 0x00, 0x00, 18 },
 247                                 Package (0x04) { 0x0013FFFF, 0x01, 0x00, 19 },
 248                                 Package (0x04) { 0x0013FFFF, 0x02, 0x00, 16 },
 249                                 Package (0x04) { 0x0013FFFF, 0x03, 0x00, 17 },
 250
 251                                 /* SMBUS / IDE / LPC / VGA / FireWire / PCI Slot 0 */
 252                                 Package (0x04) { 0x0014FFFF, 0x00, 0x00, 16 },
 253                                 Package (0x04) { 0x0014FFFF, 0x01, 0x00, 17 },
 254                                 Package (0x04) { 0x0014FFFF, 0x02, 0x00, 18 },
 255                                 Package (0x04) { 0x0014FFFF, 0x03, 0x00, 19 },
 256                         })
 257
 258                         Name (PR01, Package () {
 259                                 /* PIC */
 260                                 Package (0x04) { 0x1FFFF, 0x00, LNKF, 0x00 },
 261                                 Package (0x04) { 0x2FFFF, 0x00, LNKE, 0x00 },
 262                                 Package (0x04) { 0x3FFFF, 0x00, LNKG, 0x00 },
 263                                 Package (0x04) { 0x3FFFF, 0x01, LNKH, 0x00 },
 264                                 Package (0x04) { 0x3FFFF, 0x02, LNKE, 0x00 },
 265                                 Package (0x04) { 0x3FFFF, 0x03, LNKF, 0x00 },
 266                         })
 267
 268                         Name (AR01, Package () {
 269                                 /* APIC */
 270                                 Package (0x04) { 0x1FFFF, 0x00, 0x00, 21 },
 271                                 Package (0x04) { 0x2FFFF, 0x00, 0x00, 20 },
 272                                 Package (0x04) { 0x3FFFF, 0x00, 0x00, 22 },
 273                                 Package (0x04) { 0x3FFFF, 0x01, 0x00, 23 },
 274                                 Package (0x04) { 0x3FFFF, 0x02, 0x00, 20 },
 275                                 Package (0x04) { 0x3FFFF, 0x03, 0x00, 21 },
 276                         })
 277
 278                         Name (PR02, Package () {
 279                                 /* PIC */
 280                                 Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 },
 281                                 Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 },
 282                                 Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 },
 283                                 Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 },
 284                         })
 285
 286                         Name (AR02, Package () {
 287                                 /* APIC */
 288                                 Package (0x04) { 0xFFFF, 0x00, 0x00, 24 },
 289                                 Package (0x04) { 0xFFFF, 0x01, 0x00, 25 },
 290                                 Package (0x04) { 0xFFFF, 0x02, 0x00, 26 },
 291                                 Package (0x04) { 0xFFFF, 0x03, 0x00, 27 },
 292                         })
 293
 294                         Name (PR03, Package () {
 295                                 /* PIC */
 296                                 Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 },
 297                                 Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 },
 298                                 Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 },
 299                                 Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 },
 300                         })
 301
 302                         Name (AR03, Package () {
 303                                 /* APIC */
 304                                 Package (0x04) { 0xFFFF, 0x00, 0x00, 48 },
 305                                 Package (0x04) { 0xFFFF, 0x01, 0x00, 49 },
 306                                 Package (0x04) { 0xFFFF, 0x02, 0x00, 50 },
 307                                 Package (0x04) { 0xFFFF, 0x03, 0x00, 51 },
 308                         })
 309
 310                         Name (PR04, Package () {
 311                                 /* PIC */
 312                                 Package (0x04) { 0xFFFF, 0x00, LNKH, 0x00 },
 313                                 Package (0x04) { 0xFFFF, 0x01, LNKE, 0x00 },
 314                                 Package (0x04) { 0xFFFF, 0x02, LNKF, 0x00 },
 315                                 Package (0x04) { 0xFFFF, 0x03, LNKG, 0x00 },
 316                         })
 317
 318                         Name (AR04, Package () {
 319                                 /* APIC */
 320                                 Package (0x04) { 0xFFFF, 0x00, 0x00, 47 },
 321                                 Package (0x04) { 0xFFFF, 0x01, 0x00, 44 },
 322                                 Package (0x04) { 0xFFFF, 0x02, 0x00, 45 },
 323                                 Package (0x04) { 0xFFFF, 0x03, 0x00, 46 },
 324                         })
 325
 326                         Name (PR05, Package () {
 327                                 /* PIC */
 328                                 Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 },
 329                                 Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 },
 330                                 Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 },
 331                                 Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 },
 332                         })
 333
 334                         Name (AR05, Package () {
 335                                 /* APIC */
 336                                 Package (0x04) { 0xFFFF, 0x00, 0x00, 32 },
 337                                 Package (0x04) { 0xFFFF, 0x01, 0x00, 33 },
 338                                 Package (0x04) { 0xFFFF, 0x02, 0x00, 34 },
 339                                 Package (0x04) { 0xFFFF, 0x03, 0x00, 35 },
 340                         })
 341
 342                         Name (PR06, Package () {
 343                                 /* PIC */
 344                                 Package (0x04) { 0xFFFF, 0x00, LNKE, 0x00 },
 345                                 Package (0x04) { 0xFFFF, 0x01, LNKF, 0x00 },
 346                                 Package (0x04) { 0xFFFF, 0x02, LNKG, 0x00 },
 347                                 Package (0x04) { 0xFFFF, 0x03, LNKH, 0x00 },
 348                         })
 349
 350                         Name (AR06, Package () {
 351                                 /* APIC */
 352                                 Package (0x04) { 0xFFFF, 0x00, 0x00, 36 },
 353                                 Package (0x04) { 0xFFFF, 0x01, 0x00, 37 },
 354                                 Package (0x04) { 0xFFFF, 0x02, 0x00, 38 },
 355                                 Package (0x04) { 0xFFFF, 0x03, 0x00, 39 },
 356                         })
 357
 358                         Name (PR07, Package () {
 359                                 /* PIC */
 360                                 Package (0x04) { 0xFFFF, 0x00, LNKA, 0x00 },
 361                                 Package (0x04) { 0xFFFF, 0x01, LNKB, 0x00 },
 362                                 Package (0x04) { 0xFFFF, 0x02, LNKC, 0x00 },
 363                                 Package (0x04) { 0xFFFF, 0x03, LNKD, 0x00 },
 364                         })
 365
 366                         Name (AR07, Package () {
 367                                 /* APIC */
 368                                 Package (0x04) { 0xFFFF, 0x00, 0x00, 40 },
 369                                 Package (0x04) { 0xFFFF, 0x01, 0x00, 41 },
 370                                 Package (0x04) { 0xFFFF, 0x02, 0x00, 42 },
 371                                 Package (0x04) { 0xFFFF, 0x03, 0x00, 43 },
 372                         })
 373
 374                         /* PCI Resource Tables */
 375
 376                         /* PCI Resource Settings Access */
 377                         Method (_CRS, 0, Serialized)
 378                         {
 379                                 Name (BUF0, ResourceTemplate ()
 380                                 {
 381                                         IO (Decode16,
 382                                         0x0CF8, // Address Range Minimum
 383                                         0x0CF8, // Address Range Maximum
 384                                         0x01,   // Address Alignment
 385                                         0x08,   // Address Length
 386                                         )
 387                                         WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
 388                                         0x0000, // Address Space Granularity
 389                                         0x0000, // Address Range Minimum
 390                                         0x0CF7, // Address Range Maximum
 391                                         0x0000, // Address Translation Offset
 392                                         0x0CF8, // Address Length
 393                                         ,, , TypeStatic)
 394                                 })
 395                                 /* Methods below use SSDT to get actual MMIO regs
 396                                    The IO ports are from 0xd00, optionally an VGA,
 397                                    otherwise the info from MMIO is used.
 398                                    \_SB.GXXX(node, link)
 399                                  */
 400                                 Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1)
 401                                 Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2)
 402                                 Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3)
 403                                 Return (Local3)
 404                         }
 405
 406                         /* PCI Routing Table Access */
 407                         Method (_PRT, 0, NotSerialized) {
 408                                 If (PICM) {
 409                                         Return (AR00)
 410                                 } Else {
 411                                         Return (PR00)
 412                                 }
 413                         }
 414
 415                         /* 0:11.0 SP5100 SATA 0 */
 416                         Device(SAT0)
 417                         {
 418                                 Name (_ADR, 0x00110000)  // _ADR: Address
 419                                 Name(_PRW, Package () {0x05, 0x04})     // Wake from S1-S4
 420                                 #include "southbridge/amd/sb700/acpi/sata.asl"
 421                         }
 422
 423                         /* 0:12.0 SP5100 USB 0 */
 424                         Device (USB0)
 425                         {
 426                                 Name (_ADR, 0x00120000)  // _ADR: Address
 427                                 Name(_PRW, Package () {0x05, 0x04})     // Wake from S1-S4
 428                         }
 429
 430                         /* 0:12.1 SP5100 USB 1 */
 431                         Device (USB1)
 432                         {
 433                                 Name (_ADR, 0x00120001)  // _ADR: Address
 434                                 Name(_PRW, Package () {0x05, 0x04})     // Wake from S1-S4
 435                         }
 436
 437                         /* 0:12.2 SP5100 USB 2 */
 438                         Device (USB2)
 439                         {
 440                                 Name (_ADR, 0x00120002)  // _ADR: Address
 441                                 Name(_PRW, Package () {0x05, 0x04})     // Wake from S1-S4
 442                         }
 443
 444                         /* 0:13.0 SP5100 USB 3 */
 445                         Device (USB3)
 446                         {
 447                                 Name (_ADR, 0x00130000)  // _ADR: Address
 448                                 Name(_PRW, Package () {0x05, 0x04})     // Wake from S1-S4
 449                         }
 450
 451                         /* 0:13.1 SP5100 USB 4 */
 452                         Device (USB4)
 453                         {
 454                                 Name (_ADR, 0x00130001)  // _ADR: Address
 455                                 Name(_PRW, Package () {0x05, 0x04})     // Wake from S1-S4
 456                         }
 457
 458                         /* 0:13.2 SP5100 USB 5 */
 459                         Device (USB5)
 460                         {
 461                                 Name (_ADR, 0x00130002)  // _ADR: Address
 462                                 Name(_PRW, Package () {0x05, 0x04})     // Wake from S1-S4
 463                         }
 464
 465                         /* 0:14.1 SP5100 IDE Controller */
 466                         Device (IDEC)
 467                         {
 468                                 Name (_ADR, 0x00140001)  // _ADR: Address
 469                                 Name(_PRW, Package () {0x05, 0x04})     // Wake from S1-S4
 470                                 #include "southbridge/amd/sb700/acpi/ide.asl"
 471                         }
 472
 473                         /* 0:14.3 SP5100 LPC */
 474                         Device (LPC) {
 475                                 Name (_HID, EisaId ("PNP0A05"))
 476                                 Name (_ADR, 0x00140003)
 477
 478                                 /* PS/2 keyboard (seems to be important for WinXP install) */
 479                                 Device (KBD)
 480                                 {
 481                                         Name (_HID, EisaId ("PNP0303"))
 482                                         Name (_CID, EisaId ("PNP030B"))
 483                                         Method (_STA, 0, NotSerialized)
 484                                         {
 485                                                 Return (0x0f)
 486                                         }
 487                                         Method (_CRS, 0, Serialized)
 488                                         {
 489                                                 Name (TMP, ResourceTemplate () {
 490                                                         IO (Decode16, 0x0060, 0x0060, 0x01, 0x01)
 491                                                         IO (Decode16, 0x0064, 0x0064, 0x01, 0x01)
 492                                                         IRQNoFlags () {1}
 493                                                 })
 494                                                 Return (TMP)
 495                                         }
 496                                 }
 497
 498                                 /* PS/2 mouse */
 499                                 Device (MOU)
 500                                 {
 501                                         Name (_HID, EisaId ("PNP0F03"))
 502                                         Name (_CID, EisaId ("PNP0F13"))
 503                                         Method (_STA, 0, NotSerialized)
 504                                         {
 505                                                 Return (0x0f)
 506                                         }
 507                                         Method (_CRS, 0, Serialized)
 508                                         {
 509                                                 Name (TMP, ResourceTemplate () {
 510                                                         IRQNoFlags () {12}
 511                                                 })
 512                                                 Return (TMP)
 513                                         }
 514                                 }
 515
 516
 517                                 /* UART 1 */
 518                                 Device (URT1)
 519                                 {
 520                                         Name (_HID, EisaId ("PNP0501"))         // "PNP0501" for UART
 521                                         Name(_PRW, Package () {0x03, 0x04})     // Wake from S1-S4
 522                                         Method (_STA, 0, NotSerialized)
 523                                         {
 524                                                 Return (0x0f)                   // Always enable
 525                                         }
 526                                         Name (_PRS, ResourceTemplate() {
 527                                                 StartDependentFn(0, 1) {
 528                                                         IO(Decode16, 0x3f8, 0x3f8, 0x8, 0x8)
 529                                                         IRQNoFlags() { 4 }
 530                                                 } EndDependentFn()
 531                                         })
 532                                         Method (_CRS, 0)
 533                                         {
 534                                                 Return(ResourceTemplate() {
 535                                                         IO(Decode16, 0x3f8, 0x3f8, 0x8, 0x8)
 536                                                         IRQNoFlags() { 4 }
 537                                                 })
 538                                         }
 539                                 }
 540
 541                                 /* High Precision Event Timer */
 542                                 Device (HPET)
 543                                 {
 544                                         Name (_HID, EisaId ("PNP0103"))
 545                                         Name (CRS, ResourceTemplate ()
 546                                         {
 547                                                 Memory32Fixed (ReadOnly,
 548                                                 0x00000000,
 549                                                 0x00001000,
 550                                                 _Y02)
 551                                                 IRQNoFlags () {0}
 552                                                 IRQNoFlags () {8}
 553                                         })
 554                                         Method (_STA, 0, NotSerialized)
 555                                         {
 556                                                 Return (0x0F)
 557                                         }
 558                                         Method (_CRS, 0, NotSerialized)
 559                                         {
 560                                                 CreateDWordField (CRS, \_SB.PCI0.LPC.HPET._Y02._BAS, HPT1)
 561                                                 CreateDWordField (CRS, \_SB.PCI0.LPC.HPET._Y02._LEN, HPT2)
 562                                                 Store (SHPB, HPT1)
 563                                                 Store (SHPL, HPT2)
 564                                                 Return (CRS)
 565                                         }
 566
 567                                 }
 568                         }
 569
 570                         /* 0:14.4 PCI Bridge */
 571                         Device (PBR0)
 572                         {
 573                                 Name (_ADR, 0x00140004)                 // _ADR: Address
 574                                 Name(_PRW, Package () {0x11, 0x04})     // Wake from S1-S4
 575                                 Method (_PRT, 0, NotSerialized)         // _PRT: PCI Routing Table
 576                                 {
 577                                         If (PICM) {
 578                                                 Return (AR01)
 579                                         } Else {
 580                                                 Return (PR01)
 581                                         }
 582                                 }
 583                                 Device (SLT1)
 584                                 {
 585                                         Name (_ADR, 0xFFFF)                     // _ADR: Address
 586                                         Name(_PRW, Package () {0x0B, 0x04})     // Wake from S1-S4
 587                                 }
 588                         }
 589
 590                         /* 0:14.5 SP5100 USB 6 */
 591                         Device (USB6)
 592                         {
 593                                 Name (_ADR, 0x00140005)  // _ADR: Address
 594                                 Name(_PRW, Package () {0x05, 0x04})     // Wake from S1-S4
 595                         }
 596
 597                         /* 2:00.0 PCIe x16 */
 598                         Device (PCE1)
 599                         {
 600                                 Name (_ADR, 0x00020000)                 // _ADR: Address
 601                                 Name(_PRW, Package () {0x11, 0x04})     // Wake from S1-S4
 602                                 Method (_PRT, 0, NotSerialized)         // _PRT: PCI Routing Table
 603                                 {
 604                                         If (PICM) {
 605                                                 Return (AR02)
 606                                         } Else {
 607                                                 Return (PR02)
 608                                         }
 609                                 }
 610                                 Device (SLT1)
 611                                 {
 612                                         Name (_ADR, 0xFFFF)                     // _ADR: Address
 613                                         Name(_PRW, Package () {0x0B, 0x04})     // Wake from S1-S4
 614                                 }
 615                         }
 616
 617                         /* 3:00.0 PCIe NIC A */
 618                         Device (NICA)
 619                         {
 620                                 Name (_ADR, 0x00090000)  // _ADR: Address
 621                                 Name(_PRW, Package () {0x11, 0x04})     // Wake from S1-S4
 622                                 Method (_PRT, 0, NotSerialized)  // _PRT: PCI Routing Table
 623                                 {
 624                                         If (PICM) {
 625                                                 Return (AR03)
 626                                         } Else {
 627                                                 Return (PR03)
 628                                         }
 629                                 }
 630                                 Device (BDC1)
 631                                 {
 632                                         Name (_ADR, Zero)  // _ADR: Address
 633                                 }
 634                         }
 635
 636                         /* 4:00.0 PCIe NIC B */
 637                         Device (NICB)
 638                         {
 639                                 Name (_ADR, 0x000A0000)  // _ADR: Address
 640                                 Name(_PRW, Package () {0x11, 0x04})     // Wake from S1-S4
 641                                 Method (_PRT, 0, NotSerialized)  // _PRT: PCI Routing Table
 642                                 {
 643                                         If (PICM) {
 644                                                 Return (AR04)
 645                                         } Else {
 646                                                 Return (PR04)
 647                                         }
 648                                 }
 649                                 Device (BDC2)
 650                                 {
 651                                         Name (_ADR, Zero)  // _ADR: Address
 652                                 }
 653                         }
 654
 655                         /* 5:00.0 PCIe x16 */
 656                         Device (PCE4)
 657                         {
 658                                 Name (_ADR, 0x000B0000)                 // _ADR: Address
 659                                 Name(_PRW, Package () {0x11, 0x04})     // Wake from S1-S4
 660                                 Method (_PRT, 0, NotSerialized)         // _PRT: PCI Routing Table
 661                                 {
 662                                         If (PICM) {
 663                                                 Return (AR05)
 664                                         } Else {
 665                                                 Return (PR05)
 666                                         }
 667                                 }
 668                                 Device (SLT1)
 669                                 {
 670                                         Name (_ADR, 0xFFFF)                     // _ADR: Address
 671                                         Name(_PRW, Package () {0x0B, 0x04})     // Wake from S1-S4
 672                                 }
 673                         }
 674
 675                         /* 6:00.0 PCIe x16 */
 676                         Device (PCE5)
 677                         {
 678                                 Name (_ADR, 0x000C0000)                 // _ADR: Address
 679                                 Name(_PRW, Package () {0x11, 0x04})     // Wake from S1-S4
 680                                 Method (_PRT, 0, NotSerialized)         // _PRT: PCI Routing Table
 681                                 {
 682                                         If (PICM) {
 683                                                 Return (AR06)
 684                                         } Else {
 685                                                 Return (PR06)
 686                                         }
 687                                 }
 688                                 Device (SLT1)
 689                                 {
 690                                         Name (_ADR, 0xFFFF)                     // _ADR: Address
 691                                         Name(_PRW, Package () {0x0B, 0x04})     // Wake from S1-S4
 692                                 }
 693                         }
 694
 695                         /* 7:00.0 PCIe x16 */
 696                         Device (PCE3)
 697                         {
 698                                 Name (_ADR, 0x000D0000)                 // _ADR: Address
 699                                 Name(_PRW, Package () {0x11, 0x04})     // Wake from S1-S4
 700                                 Method (_PRT, 0, NotSerialized)         // _PRT: PCI Routing Table
 701                                 {
 702                                         If (PICM) {
 703                                                 Return (AR07)
 704                                         } Else {
 705                                                 Return (PR07)
 706                                         }
 707                                 }
 708                                 Device (SLT1)
 709                                 {
 710                                         Name (_ADR, 0xFFFF)                     // _ADR: Address
 711                                         Name(_PRW, Package () {0x0B, 0x04})     // Wake from S1-S4
 712                                 }
 713                         }
 714                 }
 715
 716                 Device (PWRB) { /* Start Power button device */
 717                         Name(_HID, EISAID("PNP0C0C"))
 718                         Name(_UID, 0xAA)
 719                         Name(_PRW, Package () {3, 0x04})        /* wake from S1-S4 */
 720                         Name(_STA, 0x0B) /* sata is invisible */
 721                 }
 722         }
 723
 724 #include "acpi/pm_ctrl.asl"
 725
 726 }