src/mainboard/amd/torpedo/romstage.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2011 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <stdint.h>
  17 #include <string.h>
  18 #include <device/pci_def.h>
  19 #include <device/pci_ids.h>
  20 #include <arch/io.h>
  21 #include <arch/stages.h>
  22 #include <device/pnp_def.h>
  23 #include <cpu/x86/lapic.h>
  24 #include <console/console.h>
  25 #include <commonlib/loglevel.h>
  26 #include <cpu/amd/car.h>
  27 #include <northbridge/amd/agesa/agesawrapper.h>
  28 #include <cpu/x86/bist.h>
  29 #include <superio/smsc/kbc1100/kbc1100.h>
  30 #include <cpu/x86/lapic.h>
  31 #include "sb_cimx.h"
  32 #include "SbPlatform.h"
  33 #include <arch/cpu.h>
  34 #include "platform_cfg.h"
  35
  36 #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1)
  37
  38 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
  39 {
  40         u32 val;
  41
  42         post_code(0x35);
  43         amd_initmmio();
  44
  45         if (!cpu_init_detectedx && boot_cpu()) {
  46                 post_code(0x30);
  47                 gpioEarlyInit();
  48                 sb_poweron_init();
  49
  50                 post_code(0x31);
  51
  52                 kbc1100_early_init(0x2e);
  53                 kbc1100_early_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
  54
  55                 post_code(0x32);
  56                 post_code(0x33);
  57                 console_init();
  58         }
  59
  60         /* Halt if there was a built in self test failure */
  61         post_code(0x34);
  62         report_bist_failure(bist);
  63
  64         // Load MPB
  65         val = cpuid_eax(1);
  66         printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
  67         printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
  68
  69         post_code(0x36);
  70         agesawrapper_amdinitreset();
  71
  72         post_code(0x37);
  73         agesawrapper_amdinitearly();
  74
  75         post_code(0x38);
  76         agesawrapper_amdinitpost();
  77
  78         post_code(0x39);
  79         printk(BIOS_DEBUG, "sb_before_pci_init ");
  80         sb_before_pci_init();
  81         printk(BIOS_DEBUG, "passed.\n");
  82
  83         post_code(0x40);
  84         agesawrapper_amdinitenv();
  85
  86         post_code(0x43);
  87         copy_and_run();
  88         printk(BIOS_ERR, "Error: copy_and_run returned!\n");
  89
  90         post_code(0x44);        // Should never see this post code.
  91 }