2 * This file is part of the coreboot project.
4 * Copyright (C) 2013 Advanced Micro Devices, Inc.
5 * Copyright (C) 2013 Sage Electronic Engineering, LLC
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 /* DefinitionBlock Statement */
19 "DSDT.AML", /* Output filename */
20 "DSDT", /* Signature */
21 0x02, /* DSDT Revision, needs to be 2 for 64bit */
23 "COREBOOT", /* TABLE ID */
24 0x00010001 /* OEM Revision */
26 { /* Start of ASL file */
27 /* #include <arch/x86/acpi/debug.asl> */ /* Include global debug methods if needed */
29 /* Globals for the platform */
30 #include "acpi/mainboard.asl"
32 /* Describe the USB Overcurrent pins */
33 #include "acpi/usb_oc.asl"
35 /* PCI IRQ mapping for the Southbridge */
36 #include <southbridge/amd/pi/hudson/acpi/pcie.asl>
38 /* Describe the processor tree (\_PR) */
39 #include <cpu/amd/pi/00730F01/acpi/cpu.asl>
41 /* Contains the supported sleep states for this chipset */
42 #include <southbridge/amd/pi/hudson/acpi/sleepstates.asl>
44 /* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
45 #include "acpi/sleep.asl"
48 Scope(\_SB) { /* Start \_SB scope */
49 /* global utility methods expected within the \_SB scope */
50 #include <arch/x86/acpi/globutil.asl>
52 /* Describe IRQ Routing mapping for this platform (within the \_SB scope) */
53 #include "acpi/routing.asl"
56 Name(_HID, EISAID("PNP0C0C"))
58 Name(_PRW, Package () {3, 0x04})
63 /* Describe the AMD Northbridge */
64 #include <northbridge/amd/pi/00730F01/acpi/northbridge.asl>
66 /* Describe the AMD Fusion Controller Hub Southbridge */
67 #include <southbridge/amd/pi/hudson/acpi/fch.asl>
70 /* Describe PCI INT[A-H] for the Southbridge */
71 #include <southbridge/amd/pi/hudson/acpi/pci_int.asl>
73 } /* End \_SB scope */
75 /* Describe SMBUS for the Southbridge */
76 #include <southbridge/amd/pi/hudson/acpi/smbus.asl>
78 /* Define the General Purpose Events for the platform */
79 #include "acpi/gpe.asl"
81 /* Define the Thermal zones and methods for the platform */
82 #include "acpi/thermal.asl"
84 /* Define the System Indicators for the platform */
85 #include "acpi/si.asl"