2 * This file is part of the coreboot project.
4 * Copyright (C) 2008 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
18 #include <device/pci_def.h>
20 #include <device/pnp_def.h>
21 #include <cpu/x86/lapic.h>
22 #include <pc80/mc146818rtc.h>
23 #include <console/console.h>
24 #include <cpu/amd/model_fxx_rev.h>
25 #include <northbridge/amd/amdk8/raminit.h>
27 #include <cpu/x86/lapic.h>
28 #include "northbridge/amd/amdk8/reset_test.c"
29 #include <superio/ite/common/ite.h>
30 #include <superio/ite/it8712f/it8712f.h>
32 #include <cpu/x86/bist.h>
33 #include "northbridge/amd/amdk8/setup_resource_map.c"
34 #include "southbridge/amd/rs690/early_setup.c"
35 #include "southbridge/amd/sb600/early_setup.c"
36 #include "northbridge/amd/amdk8/debug.c" /* After sb600_early_setup.c! */
38 #define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
40 static void memreset(int controllers
, const struct mem_controller
*ctrl
) { }
41 static void activate_spd_rom(const struct mem_controller
*ctrl
) { }
43 static inline int spd_read_byte(u32 device
, u32 address
)
45 return smbus_read_byte(device
, address
);
48 #include <northbridge/amd/amdk8/amdk8.h>
49 #include "northbridge/amd/amdk8/incoherent_ht.c"
50 #include "northbridge/amd/amdk8/raminit_f.c"
51 #include "northbridge/amd/amdk8/coherent_ht.c"
52 #include "lib/generic_sdram.c"
53 #include "resourcemap.c"
54 #include "cpu/amd/dualcore/dualcore.c"
55 #include "cpu/amd/model_fxx/init_cpus.c"
56 #include "cpu/amd/model_fxx/fidvid.c"
57 #include "northbridge/amd/amdk8/early_ht.c"
59 void cache_as_ram_main(unsigned long bist
, unsigned long cpu_init_detectedx
)
61 static const u16 spd_addr
[] = { DIMM0
, 0, 0, 0, DIMM1
, 0, 0, 0, };
65 struct cpuid_result cpuid1
;
66 struct sys_info
*sysinfo
= &sysinfo_car
;
68 if (!cpu_init_detectedx
&& boot_cpu()) {
69 /* Nothing special needs to be done to find bus 0 */
70 /* Allow the HT devices to be found */
72 /* sb600_lpc_port80(); */
77 bsp_apicid
= init_cpus(cpu_init_detectedx
, sysinfo
);
82 ite_enable_serial(SERIAL_DEV
, CONFIG_TTYS0_BASE
);
86 /* Halt if there was a built in self test failure */
87 report_bist_failure(bist
);
88 printk(BIOS_DEBUG
, "bsp_apicid=0x%x\n", bsp_apicid
);
90 setup_dbm690t_resource_map();
92 setup_coherent_ht_domain();
94 #if CONFIG_LOGICAL_CPUS
95 /* It is said that we should start core1 after all core0 launched */
96 wait_all_core0_started();
99 wait_all_aps_started(bsp_apicid
);
101 ht_setup_chains_x(sysinfo
);
103 /* run _early_setup before soft-reset. */
107 /* Check to see if processor is capable of changing FIDVID */
108 /* otherwise it will throw a GP# when reading FIDVID_STATUS */
109 cpuid1
= cpuid(0x80000007);
110 if ((cpuid1
.edx
& 0x6) == 0x6) {
111 /* Read FIDVID_STATUS */
112 msr
=rdmsr(0xc0010042);
113 printk(BIOS_DEBUG
, "begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr
.hi
, msr
.lo
);
116 enable_fid_change_on_sb(sysinfo
->sbbusn
, sysinfo
->sbdn
);
117 init_fidvid_bsp(bsp_apicid
);
119 /* show final fid and vid */
120 msr
=rdmsr(0xc0010042);
121 printk(BIOS_DEBUG
, "end msr fid, vid: hi=0x%x, lo=0x%x\n", msr
.hi
, msr
.lo
);
123 printk(BIOS_DEBUG
, "Changing FIDVID not supported\n");
126 needs_reset
= optimize_link_coherent_ht();
127 needs_reset
|= optimize_link_incoherent_ht(sysinfo
);
129 printk(BIOS_DEBUG
, "needs_reset=0x%x\n", needs_reset
);
132 printk(BIOS_INFO
, "ht reset -\n");
136 allow_all_aps_stop(bsp_apicid
);
138 /* It's the time to set ctrl now; */
139 printk(BIOS_DEBUG
, "sysinfo->nodes: %2x sysinfo->ctrl: %p spd_addr: %p\n",
140 sysinfo
->nodes
, sysinfo
->ctrl
, spd_addr
);
141 fill_mem_ctrl(sysinfo
->nodes
, sysinfo
->ctrl
, spd_addr
);
142 sdram_initialize(sysinfo
->nodes
, sysinfo
->ctrl
, sysinfo
);
144 rs690_before_pci_init();
145 sb600_before_pci_init();