tree: drop last paragraph of GPL copyright header
[coreboot.git] / src / mainboard / amd / dbm690t / mptable.c
blob261ac9ad4b8df9107f858e832212e18efd13ee89
1 /*
2 * This file is part of the coreboot project.
4 * Copyright (C) 2008 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <console/console.h>
17 #include <arch/smp/mpspec.h>
18 #include <device/pci.h>
19 #include <arch/io.h>
20 #include <string.h>
21 #include <stdint.h>
22 #include <cpu/amd/amdk8_sysconf.h>
24 extern u8 bus_rs690[8];
25 extern u8 bus_sb600[2];
27 extern u32 apicid_sb600;
29 extern u32 sbdn_rs690;
30 extern u32 sbdn_sb600;
32 static void *smp_write_config_table(void *v)
34 struct mp_config_table *mc;
35 int bus_isa;
37 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
39 mptable_init(mc, LOCAL_APIC_ADDR);
41 smp_write_processors(mc);
43 get_bus_conf();
45 mptable_write_buses(mc, NULL, &bus_isa);
47 /* I/O APICs: APIC ID Version State Address */
49 device_t dev;
50 u32 dword;
51 u8 byte;
53 dev =
54 dev_find_slot(bus_sb600[0],
55 PCI_DEVFN(sbdn_sb600 + 0x14, 0));
56 if (dev) {
57 dword = pci_read_config32(dev, 0x74) & 0xfffffff0;
58 smp_write_ioapic(mc, apicid_sb600,
59 0x11,(void *) dword);
61 /* Initialize interrupt mapping */
62 /* aza */
63 byte = pci_read_config8(dev, 0x63);
64 byte &= 0xf8;
65 byte |= 0; /* 0: INTA, ...., 7: INTH */
66 pci_write_config8(dev, 0x63, byte);
68 /* SATA */
69 dword = pci_read_config32(dev, 0xac);
70 dword &= ~(7 << 26);
71 dword |= 6 << 26; /* 0: INTA, ...., 7: INTH */
72 /* dword |= 1<<22; PIC and APIC co exists */
73 pci_write_config32(dev, 0xac, dword);
76 * 00:12.0: PROG SATA : INT F
77 * 00:13.0: INTA USB_0
78 * 00:13.1: INTB USB_1
79 * 00:13.2: INTC USB_2
80 * 00:13.3: INTD USB_3
81 * 00:13.4: INTC USB_4
82 * 00:13.5: INTD USB2
83 * 00:14.1: INTA IDE
84 * 00:14.2: Prog HDA : INT E
85 * 00:14.5: INTB ACI
86 * 00:14.6: INTB MCI
91 /* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
92 #define IO_LOCAL_INT(type, intr, apicid, pin) \
93 smp_write_lintsrc(mc, (type), MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa, (intr), (apicid), (pin));
95 mptable_add_isa_interrupts(mc, bus_isa, apicid_sb600, 0);
97 /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
98 IO_LOCAL_INT(mp_ExtINT, 0x0, MP_APIC_ALL, 0x0);
99 IO_LOCAL_INT(mp_NMI, 0x0, MP_APIC_ALL, 0x1);
100 /* There is no extension information... */
102 /* Compute the checksums */
103 return mptable_finalize(mc);
106 unsigned long write_smp_table(unsigned long addr)
108 void *v;
109 v = smp_write_floating_table(addr, 0);
110 return (unsigned long)smp_write_config_table(v);