tree: drop last paragraph of GPL copyright header
[coreboot.git] / src / ec / quanta / it8518 / ec.h
blob6fca3b94fbafada8fd94729347ac782a2ff033ca
1 /*
2 * This file is part of the coreboot project.
4 * Copyright (C) 2013 Google Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
17 * EC communication interface for QUANTA IT8518 Embedded Controller.
20 #ifndef _EC_QUANTA_IT8518_EC_H
21 #define _EC_QUANTA_IT8518_EC_H
23 #define EC_IO 0x100 /* Mainboard specific. Could be Kconfig option */
24 #define EC_IO_HIGH EC_IO + 1
25 #define EC_IO_LOW EC_IO + 2
26 #define EC_IO_DATA EC_IO + 3
28 /* Wait 400ms for keyboard controller answers */
29 #define KBC_TIMEOUT_IN_MS 400
31 // 60h/64h Command Interface
32 #define KBD_DATA 0x60
33 #define KBD_COMMAND 0x64
34 #define KBD_STATUS 0x64
35 #define KBD_IBF (1 << 1) // 1: input buffer full (data ready for ec)
36 #define KBD_OBF (1 << 0) // 1: output buffer full (data ready for host)
38 #define EC_KBD_SMI_EVENT 0xCD
39 #define EC_KBD_CMD_UNMUTE 0xE8
40 #define EC_KBD_CMD_MUTE 0xE9
42 u8 ec_kbc_read_ob(void);
43 void ec_kbc_write_cmd(u8 cmd);
44 void ec_kbc_write_ib(u8 data);
46 // 62h/66h Command Interface
47 #define EC_DATA 0x62
48 #define EC_SC 0x66 // Status & Control Register
49 #define SMI_EVT (1 << 6) // 1: SMI event was triggered
50 #define SCI_EVT (1 << 5) // 1: SCI event was triggered
52 // EC Commands (defined in ec_function_spec v3.12)
53 #define RD_EC 0x80
54 #define WR_EC 0x81
55 #define QR_EC 0x84
57 #define EC_CMD_EXIT_BOOT_BLOCK 0x85
58 #define EC_CMD_NOTIFY_ACPI_ENTER 0x86
59 #define EC_CMD_NOTIFY_ACPI_EXIT 0x87
60 #define EC_CMD_WARM_RESET 0x8C
62 // ECRAM Offsets
63 #define EC_PERIPH_CNTL_3 0x0D
64 #define EC_USB_S3_EN 0x26
65 #define EC_PERIPH_STAT_3 0x35
66 #define EC_THERM_0 0x78
67 #define EC_WAKE_SRC_ENABLE 0xBF
68 #define EC_FW_VER 0xE8 // 2 Bytes
69 #define EC_IF_MIN_VER 0xEB
70 #define EC_STATUS_REG 0xEC
71 #define EC_IF_MAJ_VER 0xEF
72 #define EC_MBAT_STATUS 0x0138
75 // EC 0.83b added status bits:
76 // BIT0=EC in RO mode
77 // BIT1=Recovery Key Sequence Detected
78 #define EC_IN_RO_MODE 0x1
79 #define EC_IN_RECOVERY_MODE 0x3
81 // EC 0.86a added enable bit:
82 #define EC_LID_WAKE_ENABLE 0x4
84 u8 ec_read_ob(void);
85 void ec_write_cmd(u8 cmd);
86 void ec_write_ib(u8 data);
88 u8 ec_read(u16 addr);
89 void ec_write(u16 addr, u8 data);
90 u8 ec_it8518_get_event(void);
91 void ec_it8518_enable_wake_events(void);
93 #endif /* _EC_QUANTA_IT8518_EC_H */