2 * This file is part of the coreboot project.
4 * Copyright (C) 2012 The ChromiumOS Authors. All rights reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
17 * Chrome OS Embedded Controller interface
19 * Constants that should be defined:
21 * SIO_EC_MEMMAP_ENABLE : Enable EC LPC memory map resources
22 * EC_LPC_ADDR_MEMMAP : Base address of memory map range
23 * EC_MEMMAP_SIZE : Size of memory map range
25 * SIO_EC_HOST_ENABLE : Enable EC host command interface resources
26 * EC_LPC_ADDR_HOST_DATA : EC host command interface data port
27 * EC_LPC_ADDR_HOST_CMD : EC host command interface command port
28 * EC_HOST_CMD_REGION0 : EC host command buffer
29 * EC_HOST_CMD_REGION1 : EC host command buffer
30 * EC_HOST_CMD_REGION_SIZE : EC host command buffer size
33 // Scope is \_SB.PCI0.LPCB
39 #ifdef SIO_EC_MEMMAP_ENABLE
41 Name (_HID, EISAID ("PNP0C02"))
45 Method (_STA, 0, NotSerialized) {
49 Name (_CRS, ResourceTemplate ()
51 IO (Decode16, EC_LPC_ADDR_MEMMAP, EC_LPC_ADDR_MEMMAP,
55 Name (_PRS, ResourceTemplate ()
57 IO (Decode16, EC_LPC_ADDR_MEMMAP, EC_LPC_ADDR_MEMMAP,
63 #ifdef SIO_EC_HOST_ENABLE
65 Name (_HID, EISAID ("PNP0C02"))
69 Method (_STA, 0, NotSerialized) {
73 Name (_CRS, ResourceTemplate ()
76 EC_LPC_ADDR_HOST_DATA, EC_LPC_ADDR_HOST_DATA,
79 EC_LPC_ADDR_HOST_CMD, EC_LPC_ADDR_HOST_CMD,
82 EC_HOST_CMD_REGION0, EC_HOST_CMD_REGION0, 0x08,
83 EC_HOST_CMD_REGION_SIZE)
85 EC_HOST_CMD_REGION1, EC_HOST_CMD_REGION0, 0x08,
86 EC_HOST_CMD_REGION_SIZE)
89 Name (_PRS, ResourceTemplate ()
91 StartDependentFn (0, 0) {
92 IO (Decode16, EC_LPC_ADDR_HOST_DATA,
93 EC_LPC_ADDR_HOST_DATA, 0x01, 0x01)
94 IO (Decode16, EC_LPC_ADDR_HOST_CMD,
95 EC_LPC_ADDR_HOST_CMD, 0x01, 0x01)
97 EC_HOST_CMD_REGION0, EC_HOST_CMD_REGION0,
98 0x08, EC_HOST_CMD_REGION_SIZE)
100 EC_HOST_CMD_REGION1, EC_HOST_CMD_REGION1,
101 0x08, EC_HOST_CMD_REGION_SIZE)
108 #ifdef SIO_EC_ENABLE_COM1
110 Name (_HID, EISAID ("PNP0501"))
114 Method (_STA, 0, NotSerialized) {
118 Name (_CRS, ResourceTemplate ()
120 IO (Decode16, 0x03F8, 0x3F8, 0x08, 0x08)
124 Name (_PRS, ResourceTemplate ()
126 StartDependentFn (0, 0) {
127 IO (Decode16, 0x03F8, 0x3F8, 0x08, 0x08)
135 #ifdef SIO_EC_ENABLE_PS2K
136 Device (PS2K) // Keyboard
140 Name (_HID, EISAID("PNP0303"))
141 Name (_CID, EISAID("PNP030B"))
143 Method (_STA, 0, NotSerialized) {
147 Name (_CRS, ResourceTemplate()
149 IO (Decode16, 0x60, 0x60, 0x01, 0x01)
150 IO (Decode16, 0x64, 0x64, 0x01, 0x01)
151 #ifdef SIO_EC_PS2K_IRQ
154 IRQ (Edge, ActiveHigh, ExclusiveAndWake) {1}
158 Name (_PRS, ResourceTemplate()
160 StartDependentFn (0, 0) {
161 IO (Decode16, 0x60, 0x60, 0x01, 0x01)
162 IO (Decode16, 0x64, 0x64, 0x01, 0x01)
163 #ifdef SIO_EC_PS2K_IRQ
166 IRQ (Edge, ActiveHigh, ExclusiveAndWake) {1}