tree: drop last paragraph of GPL copyright header
[coreboot.git] / src / device / software_i2c.c
blobbe7aebecd0c7a2a4b50dee05fd49c0d7e4e08c64
1 /*
2 * This file is part of the coreboot project.
4 * Copyright (C) 2014 Google, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <assert.h>
17 #include <timer.h>
18 #include <console/console.h>
19 #include <device/i2c.h>
22 * The implementation is based on Wikipedia.
25 #define DEBUG 0 /* Set to 1 for per-byte output */
26 #define SPEW 0 /* Set to 1 for verbose bitwise/line-state output */
27 #define DELAY_US 5 /* Default setup delay: 4us (+1 for timer inaccuracy) */
28 #define TIMEOUT_US 50000 /* Maximum clock stretching time we want to allow */
30 #define spew(...) do { if (SPEW) printk(BIOS_SPEW, ##__VA_ARGS__); } while (0)
32 struct software_i2c_ops *software_i2c[SOFTWARE_I2C_MAX_BUS];
35 * Waits until either timeout_us have passed or (iff for_scl is set) until SCL
36 * goes high. Will report random line changes during the wait and return SCL.
38 static int __wait(unsigned bus, int timeout_us, int for_scl)
40 int us;
41 int sda = software_i2c[bus]->get_sda(bus);
42 int scl = software_i2c[bus]->get_scl(bus);
43 struct stopwatch sw;
45 stopwatch_init_usecs_expire(&sw, timeout_us);
47 do {
48 int old_sda = sda;
49 int old_scl = scl;
51 us = stopwatch_duration_usecs(&sw);
53 if (old_sda != (sda = software_i2c[bus]->get_sda(bus)))
54 spew("[SDA transitioned to %d after %dus] ", sda, us);
55 if (old_scl != (scl = software_i2c[bus]->get_scl(bus)))
56 spew("[SCL transitioned to %d after %dus] ", scl, us);
57 } while (!stopwatch_expired(&sw) && (!for_scl || !scl));
59 return scl;
62 /* Waits the default DELAY_US to allow line state to stabilize. */
63 static void wait(unsigned bus)
65 __wait(bus, DELAY_US, 0);
68 /* Waits until SCL goes high. Prints a contextual error message on timeout. */
69 static int wait_for_scl(unsigned bus, const char *error_context)
71 if (!__wait(bus, TIMEOUT_US, 1)) {
72 printk(BIOS_ERR, "software_i2c(%d): ERROR: Clock stretching "
73 "timeout %s!\n", bus, error_context);
74 return -1;
77 return 0;
80 static int start_cond(unsigned bus)
82 spew("software_i2c(%d): Sending start condition... ", bus);
84 /* SDA might not yet be high if repeated start. */
85 software_i2c[bus]->set_sda(bus, 1);
86 wait(bus);
88 /* Might need to wait for clock stretching if repeated start. */
89 software_i2c[bus]->set_scl(bus, 1);
90 if (wait_for_scl(bus, "before start condition"))
91 return -1;
92 wait(bus); /* Repeated start setup time, minimum 4.7us */
94 if (!software_i2c[bus]->get_sda(bus)) {
95 printk(BIOS_ERR, "software_i2c(%d): Arbitration lost trying "
96 "to send start condition!\n", bus);
97 return -1;
100 /* SCL is high, transition SDA low as first part of start condition. */
101 software_i2c[bus]->set_sda(bus, 0);
102 wait(bus);
103 assert(software_i2c[bus]->get_scl(bus));
105 /* Pull SCL low to finish start condition (next pulse will be data). */
106 software_i2c[bus]->set_scl(bus, 0);
108 spew("Start condition transmitted!\n");
109 return 0;
112 static int stop_cond(unsigned bus)
114 spew("software_i2c(%d): Sending stop condition... ", bus);
116 /* SDA is unknown, set it to low. SCL must be low. */
117 software_i2c[bus]->set_sda(bus, 0);
118 wait(bus);
120 /* Clock stretching */
121 assert(!software_i2c[bus]->get_scl(bus));
122 software_i2c[bus]->set_scl(bus, 1);
123 if (wait_for_scl(bus, "before stop condition"))
124 return -1;
125 wait(bus); /* Stop bit setup time, minimum 4us */
127 /* SCL is high, transition SDA high to signal stop condition. */
128 software_i2c[bus]->set_sda(bus, 1);
129 wait(bus);
130 if (!software_i2c[bus]->get_sda(bus)) {
131 printk(BIOS_WARNING, "software_i2c(%d): WARNING: SDA low after "
132 "stop condition... access by another master or line "
133 "stuck from faulty slave?\n", bus);
134 /* Could theoretically happen with multi-master, so no -1. */
137 spew("Stop condition transmitted\n");
138 return 0;
141 static int out_bit(unsigned bus, int bit)
143 spew("software_i2c(%d): Sending a %d bit... ", bus, bit);
145 software_i2c[bus]->set_sda(bus, bit);
146 wait(bus);
148 if (bit && !software_i2c[bus]->get_sda(bus)) {
149 printk(BIOS_ERR, "software_i2c(%d): ERROR: SDA wedged low "
150 "by slave before clock pulse on transmit!\n", bus);
151 return -1;
154 /* Clock stretching */
155 assert(!software_i2c[bus]->get_scl(bus));
156 software_i2c[bus]->set_scl(bus, 1);
157 if (wait_for_scl(bus, "on transmit"))
158 return -1;
159 wait(bus);
161 if (bit && !software_i2c[bus]->get_sda(bus)) {
162 printk(BIOS_ERR, "software_i2c(%d): ERROR: SDA wedged low "
163 "by slave after clock pulse on transmit!\n", bus);
164 return -1;
167 assert(software_i2c[bus]->get_scl(bus));
168 software_i2c[bus]->set_scl(bus, 0);
170 spew("%d bit sent!\n", bit);
171 return 0;
174 static int in_bit(unsigned bus)
176 int bit;
178 spew("software_i2c(%d): Receiving a bit... ", bus);
180 /* Let the slave drive data */
181 software_i2c[bus]->set_sda(bus, 1);
182 wait(bus);
184 /* Clock stretching */
185 assert(!software_i2c[bus]->get_scl(bus));
186 software_i2c[bus]->set_scl(bus, 1);
187 if (wait_for_scl(bus, "on receive"))
188 return -1;
190 /* SCL is high, now data is valid */
191 bit = software_i2c[bus]->get_sda(bus);
192 wait(bus);
193 assert(software_i2c[bus]->get_scl(bus));
194 software_i2c[bus]->set_scl(bus, 0);
196 spew("Received a %d!\n", bit);
198 return bit;
201 /* Write a byte to I2C bus. Return 0 if ack by the slave. */
202 static int out_byte(unsigned bus, u8 byte)
204 unsigned bit;
205 int nack;
207 for (bit = 0; bit < 8; bit++)
208 if (out_bit(bus, (byte >> (7 - bit)) & 0x1) < 0)
209 return -1;
211 nack = in_bit(bus);
213 if (DEBUG && nack >= 0)
214 printk(BIOS_DEBUG, "software_i2c(%d): wrote byte 0x%02x, "
215 "received %s\n", bus, byte, nack ? "NAK" : "ACK");
217 return nack;
220 static int in_byte(unsigned bus, int ack)
222 u8 byte = 0;
223 int i;
224 for (i = 0; i < 8; ++i) {
225 int bit = in_bit(bus);
226 if (bit < 0)
227 return -1;
228 byte = (byte << 1) | bit;
231 if (out_bit(bus, !ack) < 0)
232 return -1;
234 if (DEBUG)
235 printk(BIOS_DEBUG, "software_i2c(%d): read byte 0x%02x, "
236 "sent %s\n", bus, byte, ack ? "ACK" : "NAK");
238 return byte;
241 int software_i2c_transfer(unsigned bus, struct i2c_seg *segments, int count)
243 int i;
244 struct i2c_seg *seg;
246 for (seg = segments; seg - segments < count; seg++) {
247 if (start_cond(bus) < 0)
248 return -1;
249 if (out_byte(bus, seg->chip << 1 | !!seg->read) < 0)
250 return -1;
251 for (i = 0; i < seg->len; i++) {
252 int ret;
253 if (seg->read) {
254 ret = in_byte(bus, i < seg->len - 1);
255 seg->buf[i] = (u8)ret;
256 } else {
257 ret = out_byte(bus, seg->buf[i]);
259 if (ret < 0)
260 return -1;
263 if (stop_cond(bus) < 0)
264 return -1;
266 return 0;
269 void software_i2c_wedge_ack(unsigned bus, u8 chip)
271 int i;
273 /* Start a command to 'chip'... */
274 start_cond(bus);
276 /* Send the address bits but don't yet read the ACK. */
277 chip <<= 1;
278 for (i = 0; i < 8; ++i)
279 out_bit(bus, (chip >> (7 - i)) & 0x1);
281 /* Let the slave drive it's ACK but keep the clock high forever. */
282 software_i2c[bus]->set_sda(bus, 1);
283 wait(bus);
284 software_i2c[bus]->set_scl(bus, 1);
285 wait_for_scl(bus, "on wedge_ack()");
287 printk(BIOS_INFO, "software_i2c(%d): wedged address write on slave "
288 "ACK. SDA %d, SCL %d\n", bus, software_i2c[bus]->get_sda(bus),
289 software_i2c[bus]->get_scl(bus));
292 void software_i2c_wedge_read(unsigned bus, u8 chip, u8 reg, int bits)
294 int i;
296 /* Start a command to 'chip'... */
297 start_cond(bus);
298 out_byte(bus, chip << 1);
299 /* ...for register 'reg'. */
300 out_byte(bus, reg);
302 /* Start a read command... */
303 start_cond(bus);
304 out_byte(bus, chip << 1 | 1);
306 /* Read bit_count bits and stop */
307 for (i = 0; i < bits; ++i)
308 in_bit(bus);
310 /* Let the slave drive SDA but keep the clock high forever. */
311 software_i2c[bus]->set_sda(bus, 1);
312 wait(bus);
313 software_i2c[bus]->set_scl(bus, 1);
314 wait_for_scl(bus, "on wedge_read()");
316 printk(BIOS_INFO, "software_i2c(%d): wedged data read after %d bits. "
317 "SDA %d, SCL %d\n", bus, bits, software_i2c[bus]->get_sda(bus),
318 software_i2c[bus]->get_scl(bus));
321 void software_i2c_wedge_write(unsigned bus, u8 chip, u8 reg, int bits)
323 int i;
325 /* Start a command to 'chip'... */
326 start_cond(bus);
327 out_byte(bus, chip << 1);
329 /* Write bit_count register bits and stop */
330 for (i = 0; i < bits; ++i)
331 out_bit(bus, (reg >> (7 - i)) & 0x1);
333 /* Pretend to write another 1 bit but keep the clock high forever. */
334 software_i2c[bus]->set_sda(bus, 1);
335 wait(bus);
336 software_i2c[bus]->set_scl(bus, 1);
337 wait_for_scl(bus, "on wedge_write()");
339 printk(BIOS_INFO, "software_i2c(%d): wedged data write after %d bits. "
340 "SDA %d, SCL %d\n", bus, bits, software_i2c[bus]->get_sda(bus),
341 software_i2c[bus]->get_scl(bus));