tree: drop last paragraph of GPL copyright header
[coreboot.git] / src / device / oprom / realmode / x86_interrupts.c
blob05cdd4a0c2a51e575e77b92c6c173f522b49d7aa
1 /*
2 * This file is part of the coreboot project.
4 * Copyright (C) 2001 Ronald G. Minnich
5 * Copyright (C) 2005 Nick.Barker9@btinternet.com
6 * Copyright (C) 2007-2009 coresystems GmbH
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #include <arch/io.h>
19 #include <arch/registers.h>
20 #include <console/console.h>
21 #include <device/pci.h>
22 #include <device/pci_ids.h>
23 #include <device/pci_ops.h>
24 #include <string.h>
26 /* we use x86emu's register file representation */
27 #include <x86emu/regs.h>
29 #include "x86.h"
31 // errors go in AH. Just set these up so that word assigns
32 // will work. KISS.
33 enum {
34 PCIBIOS_SUCCESSFUL = 0x0000,
35 PCIBIOS_UNSUPPORTED = 0x8100,
36 PCIBIOS_BADVENDOR = 0x8300,
37 PCIBIOS_NODEV = 0x8600,
38 PCIBIOS_BADREG = 0x8700
41 int int10_handler(void)
43 int res=0;
44 static u8 cursor_row=0, cursor_col=0;
45 switch((X86_EAX & 0xff00)>>8) {
46 case 0x01: // Set cursor shape
47 res = 1;
48 break;
49 case 0x02: // Set cursor position
50 if (cursor_row != ((X86_EDX >> 8) & 0xff) ||
51 cursor_col >= (X86_EDX & 0xff)) {
52 printk(BIOS_INFO, "\n");
54 cursor_row = (X86_EDX >> 8) & 0xff;
55 cursor_col = X86_EDX & 0xff;
56 res = 1;
57 break;
58 case 0x03: // Get cursor position
59 X86_EAX &= 0x00ff;
60 X86_ECX = 0x0607;
61 X86_EDX = (cursor_row << 8) | cursor_col;
62 res = 1;
63 break;
64 case 0x06: // Scroll up
65 printk(BIOS_INFO, "\n");
66 res = 1;
67 break;
68 case 0x08: // Get Character and Mode at Cursor Position
69 X86_EAX = 0x0f00 | 'A'; // White on black 'A'
70 res = 1;
71 break;
72 case 0x09: // Write Character and attribute
73 case 0x0e: // Write Character
74 printk(BIOS_INFO, "%c", X86_EAX & 0xff);
75 res = 1;
76 break;
77 case 0x0f: // Get video mode
78 X86_EAX = 0x5002; //80x25
79 X86_EBX &= 0x00ff;
80 res = 1;
81 break;
82 default:
83 printk(BIOS_WARNING, "Unknown INT10 function %04x!\n",
84 X86_EAX & 0xffff);
85 break;
87 return res;
90 int int12_handler(void)
92 X86_EAX = 64 * 1024;
93 return 1;
96 int int16_handler(void)
98 int res=0;
99 switch((X86_EAX & 0xff00)>>8) {
100 case 0x00: // Check for Keystroke
101 X86_EAX = 0x6120; // Space Bar, Space
102 res = 1;
103 break;
104 case 0x01: // Check for Keystroke
105 X86_EFLAGS |= 1<<6; // Zero Flag set (no key available)
106 res = 1;
107 break;
108 default:
109 printk(BIOS_WARNING, "Unknown INT16 function %04x!\n",
110 X86_EAX & 0xffff);
111 break;
113 return res;
116 #define PCI_CONFIG_SPACE_TYPE1 (1 << 0)
117 #define PCI_SPECIAL_CYCLE_TYPE1 (1 << 4)
119 int int1a_handler(void)
121 unsigned short func = (unsigned short)X86_EAX;
122 int retval = 1;
123 unsigned short devid, vendorid, devfn;
124 /* Use short to get rid of garbage in upper half of 32-bit register */
125 short devindex;
126 unsigned char bus;
127 struct device *dev;
128 u32 dword;
129 u16 word;
130 u8 byte, reg;
132 switch (func) {
133 case 0xb101: /* PCIBIOS Check */
134 X86_EDX = 0x20494350; /* ' ICP' */
135 X86_EAX &= 0xffff0000; /* Clear AH / AL */
136 X86_EAX |= PCI_CONFIG_SPACE_TYPE1 | PCI_SPECIAL_CYCLE_TYPE1;
137 // last bus in the system. Hard code to 255 for now.
138 // dev_enumerate() does not seem to tell us (publicly)
139 X86_ECX = 0xff;
140 X86_EDI = 0x00000000; /* protected mode entry */
141 retval = 1;
142 break;
143 case 0xb102: /* Find Device */
144 devid = X86_ECX;
145 vendorid = X86_EDX;
146 devindex = X86_ESI;
147 dev = 0;
148 while ((dev = dev_find_device(vendorid, devid, dev))) {
149 if (devindex <= 0)
150 break;
151 devindex--;
153 if (dev) {
154 unsigned short busdevfn;
155 X86_EAX &= 0xffff00ff; /* Clear AH */
156 X86_EAX |= PCIBIOS_SUCCESSFUL;
157 // busnum is an unsigned char;
158 // devfn is an int, so we mask it off.
159 busdevfn = (dev->bus->secondary << 8)
160 | (dev->path.pci.devfn & 0xff);
161 printk(BIOS_DEBUG, "0x%x: return 0x%x\n", func, busdevfn);
162 X86_EBX = busdevfn;
163 retval = 1;
164 } else {
165 X86_EAX &= 0xffff00ff; /* Clear AH */
166 X86_EAX |= PCIBIOS_NODEV;
167 retval = 0;
169 break;
170 case 0xb10a: /* Read Config Dword */
171 case 0xb109: /* Read Config Word */
172 case 0xb108: /* Read Config Byte */
173 case 0xb10d: /* Write Config Dword */
174 case 0xb10c: /* Write Config Word */
175 case 0xb10b: /* Write Config Byte */
176 devfn = X86_EBX & 0xff;
177 bus = X86_EBX >> 8;
178 reg = X86_EDI;
179 dev = dev_find_slot(bus, devfn);
180 if (!dev) {
181 printk(BIOS_DEBUG, "0x%x: BAD DEVICE bus %d devfn 0x%x\n", func, bus, devfn);
182 // Or are we supposed to return PCIBIOS_NODEV?
183 X86_EAX &= 0xffff00ff; /* Clear AH */
184 X86_EAX |= PCIBIOS_BADREG;
185 retval = 0;
186 return retval;
188 switch (func) {
189 case 0xb108: /* Read Config Byte */
190 byte = pci_read_config8(dev, reg);
191 X86_ECX = byte;
192 break;
193 case 0xb109: /* Read Config Word */
194 word = pci_read_config16(dev, reg);
195 X86_ECX = word;
196 break;
197 case 0xb10a: /* Read Config Dword */
198 dword = pci_read_config32(dev, reg);
199 X86_ECX = dword;
200 break;
201 case 0xb10b: /* Write Config Byte */
202 byte = X86_ECX;
203 pci_write_config8(dev, reg, byte);
204 break;
205 case 0xb10c: /* Write Config Word */
206 word = X86_ECX;
207 pci_write_config16(dev, reg, word);
208 break;
209 case 0xb10d: /* Write Config Dword */
210 dword = X86_ECX;
211 pci_write_config32(dev, reg, dword);
212 break;
215 #if CONFIG_REALMODE_DEBUG
216 printk(BIOS_DEBUG, "0x%x: bus %d devfn 0x%x reg 0x%x val 0x%x\n",
217 func, bus, devfn, reg, X86_ECX);
218 #endif
219 X86_EAX &= 0xffff00ff; /* Clear AH */
220 X86_EAX |= PCIBIOS_SUCCESSFUL;
221 retval = 1;
222 break;
223 default:
224 printk(BIOS_ERR, "UNSUPPORTED PCIBIOS FUNCTION 0x%x\n", func);
225 X86_EAX &= 0xffff00ff; /* Clear AH */
226 X86_EAX |= PCIBIOS_UNSUPPORTED;
227 retval = 0;
228 break;
231 return retval;