src/device/cardbus_device.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2005 Linux Networx
   5  * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
   6  * Copyright (C) 2005 Ronald G. Minnich <rminnich@gmail.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; version 2 of the License.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  */
  17
  18 #include <console/console.h>
  19 #include <device/device.h>
  20 #include <device/pci.h>
  21 #include <device/pci_ids.h>
  22 #include <device/cardbus.h>
  23
  24 /*
  25  * I don't think this code is quite correct but it is close.
  26  * Anyone with a cardbus bridge and a little time should be able
  27  * to make it usable quickly. -- Eric Biederman 24 March 2005
  28  */
  29
  30 /*
  31  * IO should be max 256 bytes. However, since we may have a P2P bridge below
  32  * a cardbus bridge, we need 4K.
  33  */
  34 #define CARDBUS_IO_SIZE         4096
  35 #define CARDBUS_MEM_SIZE        (32 * 1024 * 1024)
  36
  37 static void cardbus_record_bridge_resource(device_t dev, resource_t moving,
  38                 resource_t min_size, unsigned int index, unsigned long type)
  39 {
  40         struct resource *resource;
  41         unsigned long gran;
  42         resource_t step;
  43
  44         /* Initialize the constraints on the current bus. */
  45         resource = NULL;
  46         if (!moving)
  47                 return;
  48
  49         resource = new_resource(dev, index);
  50         resource->size = 0;
  51         gran = 0;
  52         step = 1;
  53         while ((moving & step) == 0) {
  54                 gran += 1;
  55                 step <<= 1;
  56         }
  57         resource->gran = gran;
  58         resource->align = gran;
  59         resource->limit = moving | (step - 1);
  60         resource->flags = type;
  61
  62         /* Don't let the minimum size exceed what we can put in the resource. */
  63         if ((min_size - 1) > resource->limit)
  64                 min_size = resource->limit + 1;
  65
  66         resource->size = min_size;
  67 }
  68
  69 static void cardbus_size_bridge_resource(device_t dev, unsigned int index)
  70 {
  71         struct resource *resource;
  72         resource_t min_size;
  73
  74         resource = find_resource(dev, index);
  75         if (resource) {
  76                 min_size = resource->size;
  77                 /*
  78                  * Always allocate at least the miniumum size to a
  79                  * cardbus bridge in case a new card is plugged in.
  80                  */
  81                 if (resource->size < min_size)
  82                         resource->size = min_size;
  83         }
  84 }
  85
  86 void cardbus_read_resources(device_t dev)
  87 {
  88         resource_t moving_base, moving_limit, moving;
  89         unsigned long type;
  90         u16 ctl;
  91
  92         /* See if needs a card control registers base address. */
  93
  94         pci_get_resource(dev, PCI_BASE_ADDRESS_0);
  95
  96         compact_resources(dev);
  97
  98         /* See which bridge I/O resources are implemented. */
  99         moving_base = pci_moving_config32(dev, PCI_CB_IO_BASE_0);
 100         moving_limit = pci_moving_config32(dev, PCI_CB_IO_LIMIT_0);
 101         moving = moving_base & moving_limit;
 102
 103         /* Initialize the I/O space constraints on the current bus. */
 104         cardbus_record_bridge_resource(dev, moving, CARDBUS_IO_SIZE,
 105                                        PCI_CB_IO_BASE_0, IORESOURCE_IO);
 106         cardbus_size_bridge_resource(dev, PCI_CB_IO_BASE_0);
 107
 108         /* See which bridge I/O resources are implemented. */
 109         moving_base = pci_moving_config32(dev, PCI_CB_IO_BASE_1);
 110         moving_limit = pci_moving_config32(dev, PCI_CB_IO_LIMIT_1);
 111         moving = moving_base & moving_limit;
 112
 113         /* Initialize the I/O space constraints on the current bus. */
 114         cardbus_record_bridge_resource(dev, moving, CARDBUS_IO_SIZE,
 115                                        PCI_CB_IO_BASE_1, IORESOURCE_IO);
 116
 117         /* If I can, enable prefetch for mem0. */
 118         ctl = pci_read_config16(dev, PCI_CB_BRIDGE_CONTROL);
 119         ctl &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM0;
 120         ctl &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM1;
 121         ctl |= PCI_CB_BRIDGE_CTL_PREFETCH_MEM0;
 122         pci_write_config16(dev, PCI_CB_BRIDGE_CONTROL, ctl);
 123         ctl = pci_read_config16(dev, PCI_CB_BRIDGE_CONTROL);
 124
 125         /* See which bridge memory resources are implemented. */
 126         moving_base = pci_moving_config32(dev, PCI_CB_MEMORY_BASE_0);
 127         moving_limit = pci_moving_config32(dev, PCI_CB_MEMORY_LIMIT_0);
 128         moving = moving_base & moving_limit;
 129
 130         /* Initialize the memory space constraints on the current bus. */
 131         type = IORESOURCE_MEM;
 132         if (ctl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0)
 133                 type |= IORESOURCE_PREFETCH;
 134         cardbus_record_bridge_resource(dev, moving, CARDBUS_MEM_SIZE,
 135                                        PCI_CB_MEMORY_BASE_0, type);
 136         if (type & IORESOURCE_PREFETCH)
 137                 cardbus_size_bridge_resource(dev, PCI_CB_MEMORY_BASE_0);
 138
 139         /* See which bridge memory resources are implemented. */
 140         moving_base = pci_moving_config32(dev, PCI_CB_MEMORY_BASE_1);
 141         moving_limit = pci_moving_config32(dev, PCI_CB_MEMORY_LIMIT_1);
 142         moving = moving_base & moving_limit;
 143
 144         /* Initialize the memory space constraints on the current bus. */
 145         cardbus_record_bridge_resource(dev, moving, CARDBUS_MEM_SIZE,
 146                                        PCI_CB_MEMORY_BASE_1, IORESOURCE_MEM);
 147         cardbus_size_bridge_resource(dev, PCI_CB_MEMORY_BASE_1);
 148
 149         compact_resources(dev);
 150 }
 151
 152 void cardbus_enable_resources(device_t dev)
 153 {
 154         u16 ctrl;
 155
 156         ctrl = pci_read_config16(dev, PCI_CB_BRIDGE_CONTROL);
 157         ctrl |= (dev->link_list->bridge_ctrl & (
 158                         PCI_BRIDGE_CTL_PARITY |
 159                         PCI_BRIDGE_CTL_SERR |
 160                         PCI_BRIDGE_CTL_NO_ISA |
 161                         PCI_BRIDGE_CTL_VGA |
 162                         PCI_BRIDGE_CTL_MASTER_ABORT |
 163                         PCI_BRIDGE_CTL_BUS_RESET));
 164         /* Error check */
 165         ctrl |= (PCI_CB_BRIDGE_CTL_PARITY + PCI_CB_BRIDGE_CTL_SERR);
 166         printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl);
 167         pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl);
 168
 169         pci_dev_enable_resources(dev);
 170 }
 171
 172 struct device_operations default_cardbus_ops_bus = {
 173         .read_resources   = cardbus_read_resources,
 174         .set_resources    = pci_dev_set_resources,
 175         .enable_resources = cardbus_enable_resources,
 176         .init             = 0,
 177         .scan_bus         = pci_scan_bridge,
 178         .enable           = 0,
 179         .reset_bus        = pci_bus_reset,
 180 };