src/arch/arm64/transition.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright 2014 Google Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <arch/lib_helpers.h>
  17 #include <arch/transition.h>
  18 #include <console/console.h>
  19
  20 /* Litte-endian, No XN-forced, Instr cache disabled,
  21  * Stack alignment disabled, Data and unified cache
  22  * disabled, Alignment check disabled, MMU disabled
  23  */
  24 #define SCTLR_MASK  (SCTLR_MMU_DISABLE | SCTLR_ACE_DISABLE | \
  25                      SCTLR_CACHE_DISABLE | SCTLR_SAE_DISABLE | SCTLR_RES1 | \
  26                      SCTLR_ICE_DISABLE | SCTLR_WXN_DISABLE | SCTLR_LITTLE_END)
  27
  28 void __attribute__((weak)) exc_dispatch(struct exc_state *exc_state, uint64_t id)
  29 {
  30         /* Default weak implementation does nothing. */
  31 }
  32
  33 void exc_entry(struct exc_state *exc_state, uint64_t id)
  34 {
  35         struct elx_state *elx = &exc_state->elx;
  36         struct regs *regs = &exc_state->regs;
  37         uint8_t elx_mode, elx_el;
  38
  39         elx->spsr = raw_read_spsr_current();
  40         elx_mode = get_mode_from_spsr(elx->spsr);
  41         elx_el = get_el_from_spsr(elx->spsr);
  42
  43         if (elx_mode == SPSR_USE_H) {
  44                 if (elx_el == get_current_el())
  45                         regs->sp = (uint64_t)&exc_state[1];
  46                 else
  47                         regs->sp = raw_read_sp_elx(elx_el);
  48         } else {
  49                 regs->sp = raw_read_sp_el0();
  50         }
  51
  52         elx->elr = raw_read_elr_current();
  53
  54         exc_dispatch(exc_state, id);
  55 }
  56
  57 void transition_with_entry(void *entry, void *arg, struct exc_state *exc_state)
  58 {
  59         /* Argument to entry point goes into X0 */
  60         exc_state->regs.x[X0_INDEX] = (uint64_t)arg;
  61         /* Entry point goes into ELR */
  62         exc_state->elx.elr = (uint64_t)entry;
  63
  64         transition(exc_state);
  65 }
  66
  67 void transition(struct exc_state *exc_state)
  68 {
  69         uint32_t scr_mask;
  70         uint64_t hcr_mask;
  71         uint64_t sctlr;
  72         uint32_t current_el = get_current_el();
  73
  74         struct elx_state *elx = &exc_state->elx;
  75         struct regs *regs = &exc_state->regs;
  76
  77         uint8_t elx_el = get_el_from_spsr(elx->spsr);
  78
  79         /*
  80          * Policies enforced:
  81          * 1. We support only elx --> (elx - 1) transitions
  82          * 2. We support transitions to Aarch64 mode only
  83          *
  84          * If any of the above conditions holds false, then we need a proper way
  85          * to update SCR/HCR before removing the checks below
  86          */
  87         if ((current_el - elx_el) != 1)
  88                 die("ARM64 Error: Do not support transition\n");
  89
  90         if (elx->spsr & SPSR_ERET_32)
  91                 die("ARM64 Error: Do not support eret to Aarch32\n");
  92         else {
  93                 scr_mask = SCR_LOWER_AARCH64;
  94                 hcr_mask = HCR_LOWER_AARCH64;
  95         }
  96
  97         /* SCR: Write to SCR if current EL is EL3 */
  98         if (current_el == EL3) {
  99                 uint32_t scr = raw_read_scr_el3();
 100                 scr |= scr_mask;
 101                 raw_write_scr_el3(scr);
 102         }
 103         /* HCR: Write to HCR if current EL is EL2 */
 104         else if (current_el == EL2) {
 105                 uint64_t hcr = raw_read_hcr_el2();
 106                 hcr |= hcr_mask;
 107                 raw_write_hcr_el2(hcr);
 108         }
 109
 110         /* ELR/SPSR: Write entry point and processor state of program */
 111         raw_write_elr_current(elx->elr);
 112         raw_write_spsr_current(elx->spsr);
 113
 114         /* SCTLR: Initialize EL with selected properties */
 115         sctlr = raw_read_sctlr(elx_el);
 116         sctlr &= SCTLR_MASK;
 117         raw_write_sctlr(sctlr, elx_el);
 118
 119         /* SP_ELx: Initialize stack pointer */
 120         raw_write_sp_elx(elx->sp_elx, elx_el);
 121
 122         /* Eret to the entry point */
 123         trans_switch(regs);
 124 }