tree: drop last paragraph of GPL copyright header
[coreboot.git] / payloads / libpayload / include / sysinfo.h
blobb97ae14771ab9794fd0af92b2360a0c4a2cbd214
1 /*
2 * This file is part of the libpayload project.
4 * Copyright (C) 2008 Advanced Micro Devices, Inc.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
30 #ifndef _SYSINFO_H
31 #define _SYSINFO_H
33 /* Maximum number of memory range definitions. */
34 #define SYSINFO_MAX_MEM_RANGES 32
35 /* Allow a maximum of 8 GPIOs */
36 #define SYSINFO_MAX_GPIOS 8
38 /* Up to 10 MAC addresses */
39 #define SYSINFO_MAX_MACS 10
41 #include <coreboot_tables.h>
43 struct cb_serial;
46 * All pointers in here shall be virtual.
48 * If a relocation happens after the last call to lib_get_sysinfo(),
49 * it is up to the user to call lib_get_sysinfo() again.
51 struct sysinfo_t {
52 unsigned int cpu_khz;
53 struct cb_serial *serial;
54 unsigned short ser_ioport;
55 unsigned long ser_base; // for mmapped serial
57 int n_memranges;
59 struct memrange {
60 unsigned long long base;
61 unsigned long long size;
62 unsigned int type;
63 } memrange[SYSINFO_MAX_MEM_RANGES];
65 struct cb_cmos_option_table *option_table;
66 u32 cmos_range_start;
67 u32 cmos_range_end;
68 u32 cmos_checksum_location;
69 #if IS_ENABLED(CONFIG_LP_CHROMEOS)
70 u32 vbnv_start;
71 u32 vbnv_size;
72 #endif
74 char *version;
75 char *extra_version;
76 char *build;
77 char *compile_time;
78 char *compile_by;
79 char *compile_host;
80 char *compile_domain;
81 char *compiler;
82 char *linker;
83 char *assembler;
85 char *cb_version;
87 struct cb_framebuffer *framebuffer;
89 #if IS_ENABLED(CONFIG_LP_CHROMEOS)
90 int num_gpios;
91 struct cb_gpio gpios[SYSINFO_MAX_GPIOS];
92 int num_macs;
93 struct mac_address macs[SYSINFO_MAX_MACS];
94 char *serialno;
95 #endif
97 unsigned long *mbtable; /** Pointer to the multiboot table */
99 struct cb_header *header;
100 struct cb_mainboard *mainboard;
102 #if IS_ENABLED(CONFIG_LP_CHROMEOS)
103 void *vboot_handoff;
104 u32 vboot_handoff_size;
105 void *vdat_addr;
106 u32 vdat_size;
107 #endif
109 #if IS_ENABLED(CONFIG_LP_ARCH_X86)
110 int x86_rom_var_mtrr_index;
111 #endif
113 void *tstamp_table;
114 void *cbmem_cons;
115 void *mrc_cache;
116 void *acpi_gnvs;
117 u32 board_id;
118 u32 ram_code;
119 void *wifi_calibration;
120 uint64_t ramoops_buffer;
121 uint32_t ramoops_buffer_size;
122 struct {
123 uint32_t size;
124 uint32_t sector_size;
125 uint32_t erase_cmd;
126 } spi_flash;
127 uint64_t fmap_offset;
128 uint64_t cbfs_offset;
129 uint64_t cbfs_size;
130 uint64_t boot_media_size;
131 uint64_t mtc_start;
132 uint32_t mtc_size;
135 extern struct sysinfo_t lib_sysinfo;
138 * Check if this is an architecture specific coreboot table record and process
139 * it, if it is. Return 1 if record type was recognized, 0 otherwise.
141 int cb_parse_arch_specific(struct cb_record *rec, struct sysinfo_t *info);
144 * Check if the region in range addr..addr+len contains a 16 byte aligned
145 * coreboot table. If it does - process the table filling up the sysinfo
146 * structure with information from the table. Return 0 on success and -1 on
147 * failure.
149 int cb_parse_header(void *addr, int len, struct sysinfo_t *info);
151 #endif