payloads/libpayload/include/mips/arch/cache.h

   1 /*
   2  * This file is part of the libpayload project.
   3  *
   4  * Copyright (C) 2014 Imagination Technologies
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #ifndef __MIPS_ARCH_CACHE_H__
  17 #define __MIPS_ARCH_CACHE_H__
  18
  19
  20 #include <stddef.h>
  21 #include <stdint.h>
  22
  23
  24 /*
  25  * Sync primitives
  26  */
  27
  28 /* data memory barrier */
  29 static inline void dmb(void)
  30 {
  31         /* TODO */
  32 }
  33
  34 /* data sync barrier */
  35 static inline void dsb(void)
  36 {
  37         /* TODO */
  38 }
  39
  40 /* instruction sync barrier */
  41 static inline void isb(void)
  42 {
  43         /* TODO */
  44 }
  45
  46
  47 /*
  48  * Cache maintenance API
  49  */
  50
  51 /* dcache clean and invalidate all */
  52 void dcache_clean_invalidate_all(void);
  53
  54 /* dcache clean all */
  55 void dcache_clean_all(void);
  56
  57 /* dcache invalidate all (on current level given by CCSELR) */
  58 void dcache_invalidate_all(void);
  59
  60 /* returns number of bytes per cache line */
  61 unsigned int dcache_line_bytes(void);
  62
  63 /* dcache and MMU disable */
  64 void dcache_mmu_disable(void);
  65
  66 /* dcache and MMU enable */
  67 void dcache_mmu_enable(void);
  68
  69 /* perform all icache/dcache maintenance needed after loading new code */
  70 void cache_sync_instructions(void);
  71
  72 /* tlb invalidate all */
  73 void tlb_invalidate_all(void);
  74
  75 /*
  76  * Generalized setup/init functions
  77  */
  78
  79 /* mmu initialization (set page table address, set permissions, etc) */
  80 void mmu_init(void);
  81
  82 enum dcache_policy {
  83         DCACHE_OFF,
  84         DCACHE_WRITEBACK,
  85         DCACHE_WRITETHROUGH,
  86 };
  87
  88 /* disable the mmu for a range. Primarily useful to lock out address 0. */
  89 void mmu_disable_range(unsigned long start_mb, unsigned long size_mb);
  90 /* mmu range configuration (set dcache policy) */
  91 void mmu_config_range(unsigned long start_mb, unsigned long size_mb,
  92                                                 enum dcache_policy policy);
  93
  94 #endif /* __MIPS_ARCH_CACHE_H__ */