src/mainboard/google/brya/mainboard.c

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <acpi/acpigen.h>
   4 #include <baseboard/gpio.h>
   5 #include <baseboard/variants.h>
   6 #include <device/device.h>
   7 #include <drivers/tpm/cr50.h>
   8 #include <drivers/wwan/fm/chip.h>
   9 #include <ec/ec.h>
  10 #include <fw_config.h>
  11 #include <security/tpm/tss.h>
  12 #include <soc/gpio.h>
  13 #include <soc/ramstage.h>
  14 #include <stdio.h>
  15
  16 WEAK_DEV_PTR(rp6_wwan);
  17
  18 static void add_fw_config_oem_string(const struct fw_config *config, void *arg)
  19 {
  20         struct smbios_type11 *t;
  21         char buffer[64];
  22
  23         t = (struct smbios_type11 *)arg;
  24
  25         snprintf(buffer, sizeof(buffer), "%s-%s", config->field_name, config->option_name);
  26         t->count = smbios_add_string(t->eos, buffer);
  27 }
  28
  29 static void mainboard_smbios_strings(struct device *dev, struct smbios_type11 *t)
  30 {
  31         fw_config_for_each_found(add_fw_config_oem_string, t);
  32 }
  33
  34 void mainboard_update_soc_chip_config(struct soc_intel_alderlake_config *config)
  35 {
  36         int ret;
  37
  38         ret = tlcl_lib_init();
  39         if (ret != VB2_SUCCESS) {
  40                 printk(BIOS_ERR, "tlcl_lib_init() failed: 0x%x\n", ret);
  41                 return;
  42         }
  43
  44         if (cr50_is_long_interrupt_pulse_enabled()) {
  45                 printk(BIOS_INFO, "Enabling GPIO PM b/c CR50 has long IRQ pulse support\n");
  46                 config->gpio_override_pm = 0;
  47         } else {
  48                 printk(BIOS_INFO, "Disabling GPIO PM b/c CR50 does not have long IRQ pulse "
  49                        "support\n");
  50                 config->gpio_override_pm = 1;
  51                 config->gpio_pm[COMM_0] = 0;
  52                 config->gpio_pm[COMM_1] = 0;
  53                 config->gpio_pm[COMM_2] = 0;
  54                 config->gpio_pm[COMM_3] = 0;
  55                 config->gpio_pm[COMM_4] = 0;
  56                 config->gpio_pm[COMM_5] = 0;
  57         }
  58
  59         variant_update_soc_chip_config(config);
  60 }
  61
  62 __weak void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
  63 {
  64         /* default implementation does nothing */
  65 }
  66
  67 __weak void variant_init(void)
  68 {
  69         /* default implementation does nothing */
  70 }
  71
  72 static void mainboard_init(void *chip_info)
  73 {
  74         const struct pad_config *base_pads;
  75         const struct pad_config *override_pads;
  76         size_t base_num, override_num;
  77
  78         base_pads = variant_gpio_table(&base_num);
  79         override_pads = variant_gpio_override_table(&override_num);
  80         gpio_configure_pads_with_override(base_pads, base_num, override_pads, override_num);
  81
  82         variant_init();
  83         variant_devtree_update();
  84 }
  85
  86 void __weak variant_devtree_update(void)
  87 {
  88         /* Override dev tree settings per board */
  89 }
  90
  91 static void mainboard_dev_init(struct device *dev)
  92 {
  93         mainboard_ec_init();
  94 }
  95
  96 static void mainboard_generate_shutdown(const struct device *dev)
  97 {
  98         const struct drivers_wwan_fm_config *config = config_of(dev);
  99         const struct device *parent = dev->bus->dev;
 100
 101         if (!config)
 102                 return;
 103         if (config->rtd3dev) {
 104                 acpigen_write_store();
 105                 acpigen_emit_namestring(acpi_device_path_join(parent, "RTD3._STA"));
 106                 acpigen_emit_byte(LOCAL0_OP);
 107                 acpigen_write_if_lequal_op_int(LOCAL0_OP, ONE_OP);
 108                 {
 109                         acpigen_emit_namestring(acpi_device_path_join(dev, "DPTS"));
 110                         acpigen_emit_byte(ARG0_OP);
 111                 }
 112                 acpigen_write_if_end();
 113         } else {
 114                 acpigen_emit_namestring(acpi_device_path_join(dev, "DPTS"));
 115                 acpigen_emit_byte(ARG0_OP);
 116         }
 117 }
 118
 119 static void mainboard_generate_s0ix_hook(void)
 120 {
 121         acpigen_write_if_lequal_op_int(ARG0_OP, 1);
 122         {
 123                 if (CONFIG(HAVE_SLP_S0_GATE))
 124                         acpigen_soc_clear_tx_gpio(GPIO_SLP_S0_GATE);
 125                 variant_generate_s0ix_hook(S0IX_ENTRY);
 126         }
 127         acpigen_write_else();
 128         {
 129                 if (CONFIG(HAVE_SLP_S0_GATE))
 130                         acpigen_soc_set_tx_gpio(GPIO_SLP_S0_GATE);
 131                 variant_generate_s0ix_hook(S0IX_EXIT);
 132         }
 133         acpigen_write_if_end();
 134 }
 135
 136 static void mainboard_fill_ssdt(const struct device *dev)
 137 {
 138         const struct device *wwan = DEV_PTR(rp6_wwan);
 139
 140         if (wwan) {
 141                 acpigen_write_scope("\\_SB");
 142                 acpigen_write_method_serialized("MPTS", 1);
 143                 mainboard_generate_shutdown(wwan);
 144                 acpigen_write_method_end(); /* Method */
 145                 acpigen_write_scope_end(); /* Scope */
 146         }
 147         /* for variant to fill additional SSDT */
 148         variant_fill_ssdt(dev);
 149
 150         acpigen_write_scope("\\_SB");
 151         acpigen_write_method_serialized("MS0X", 1);
 152         mainboard_generate_s0ix_hook();
 153         acpigen_write_method_end(); /* Method */
 154         acpigen_write_scope_end(); /* Scope */
 155
 156 }
 157
 158 void __weak variant_fill_ssdt(const struct device *dev)
 159 {
 160         /* Add board-specific SSDT entries */
 161 }
 162
 163 void __weak variant_generate_s0ix_hook(enum s0ix_entry entry)
 164 {
 165         /* Add board-specific MS0X entries */
 166         /*
 167            if (s0ix_entry == S0IX_ENTRY) {
 168                 implement variant operations here
 169            }
 170            if (s0ix_entry == S0IX_EXIT) {
 171                 implement variant operations here
 172            }
 173          */
 174 }
 175
 176 static void mainboard_enable(struct device *dev)
 177 {
 178         dev->ops->init = mainboard_dev_init;
 179         dev->ops->get_smbios_strings = mainboard_smbios_strings;
 180         dev->ops->acpi_fill_ssdt = mainboard_fill_ssdt;
 181 }
 182
 183
 184 void __weak variant_finalize(void)
 185 {
 186 }
 187
 188 static void mainboard_final(void *chip_info)
 189 {
 190         variant_finalize();
 191 }
 192
 193 struct chip_operations mainboard_ops = {
 194         .init = mainboard_init,
 195         .enable_dev = mainboard_enable,
 196         .final = mainboard_final,
 197 };