src/mainboard/bap/ode_e21XX/OemCustomize.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2012 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <northbridge/amd/pi/agesawrapper.h>
  17
  18
  19 static const PCIe_PORT_DESCRIPTOR PortList [] = {
  20         /* Initialize Port descriptor (PCIe port, Lanes 2-3, PCI Device 2, Function 4) */
  21         {
  22                 0,
  23                 PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 2, 3),
  24                 PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 2, 4,
  25                                 HotplugDisabled,
  26                                 PcieGenMaxSupported,
  27                                 PcieGenMaxSupported,
  28                                 AspmDisabled, 0x02, 0)
  29         },
  30         /* Initialize Port descriptor (PCIe port, Lane 1, PCI Device 2, Function 3) */
  31         {
  32                 0,
  33                 PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 1, 1),
  34                 PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 2, 3,
  35                                 HotplugDisabled,
  36                                 PcieGenMaxSupported,
  37                                 PcieGenMaxSupported,
  38                                 AspmDisabled, 0x03, 0)
  39         },
  40         /* Initialize Port descriptor (PCIe port, Lane 0, PCI Device 2, Function 2) */
  41         {
  42                 0,
  43                 PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 0, 0),
  44                 PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 2, 2,
  45                                 HotplugDisabled,
  46                                 PcieGenMaxSupported,
  47                                 PcieGenMaxSupported,
  48                                 AspmDisabled, 0x04, 0)
  49         },
  50         /* Initialize Port descriptor (PCIe port, Lanes 4-7, PCI Device 2, Function 1) */
  51         {
  52                 DESCRIPTOR_TERMINATE_LIST,
  53                 PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 4, 7),
  54                 PCIE_PORT_DATA_INITIALIZER_V2 (PortEnabled, ChannelTypeExt6db, 2, 1,
  55                                 HotplugDisabled,
  56                                 PcieGenMaxSupported,
  57                                 PcieGenMaxSupported,
  58                                 AspmDisabled, 0x05, 0)
  59         }
  60 };
  61
  62 static const PCIe_DDI_DESCRIPTOR DdiList [] = {
  63         /* eDP0 to LVDS connector */
  64         {
  65                 0,
  66                 PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 8, 11),
  67                 PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux1, Hdp1)
  68         },
  69         /* DP1 to HDMI */
  70         {
  71                 DESCRIPTOR_TERMINATE_LIST,
  72                 PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 12, 15),
  73                 PCIE_DDI_DATA_INITIALIZER (ConnectorTypeHDMI, Aux2, Hdp2)
  74         },
  75 };
  76
  77 static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = {
  78         .Flags        = DESCRIPTOR_TERMINATE_LIST,
  79         .SocketId     = 0,
  80         .PciePortList = PortList,
  81         .DdiLinkList  = DdiList
  82 };
  83
  84 /*---------------------------------------------------------------------------------------*/
  85 /**
  86  *  OemCustomizeInitEarly
  87  *
  88  *  Description:
  89  *    This stub function will call the host environment through the binary block
  90  *    interface (call-out port) to provide a user hook opportunity
  91  *
  92  *  Parameters:
  93  *    @param[in]      *InitEarly
  94  *
  95  *    @retval         VOID
  96  *
  97  **/
  98 /*---------------------------------------------------------------------------------------*/
  99 VOID
 100 OemCustomizeInitEarly (
 101         IN  OUT AMD_EARLY_PARAMS    *InitEarly
 102         )
 103 {
 104         InitEarly->GnbConfig.PcieComplexList = &PcieComplex;
 105 }