src/southbridge/intel/i82801jx/smihandler.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <types.h>
   4 #include <console/console.h>
   5 #include <device/pci_def.h>
   6 #include <southbridge/intel/common/pmutil.h>
   7 #include "i82801jx.h"
   8
   9 /* While we read PMBASE dynamically in case it changed, let's
  10  * initialize it with a sane value
  11  */
  12 u16 pmbase = DEFAULT_PMBASE;
  13
  14 void southbridge_smi_monitor(void)
  15 {
  16 #define IOTRAP(x) (trap_sts & (1 << x))
  17         u32 trap_sts, trap_cycle;
  18         u32 data, mask = 0;
  19         int i;
  20
  21         trap_sts = RCBA32(0x1e00); // TRSR - Trap Status Register
  22         RCBA32(0x1e00) = trap_sts; // Clear trap(s) in TRSR
  23
  24         trap_cycle = RCBA32(0x1e10);
  25         for (i=16; i<20; i++) {
  26                 if (trap_cycle & (1 << i))
  27                         mask |= (0xff << ((i - 16) << 3));
  28         }
  29
  30         /* IOTRAP(3) SMI function call (unused) */
  31         if (IOTRAP(3)) {
  32                 printk(BIOS_DEBUG, "SMI function call not implemented\n");
  33                 return;
  34         }
  35
  36         /* IOTRAP(2) currently unused
  37          * IOTRAP(1) currently unused */
  38
  39         /* IOTRAP(0) SMIC */
  40         if (IOTRAP(0)) {
  41                 if (!(trap_cycle & (1 << 24))) { // It's a write
  42                         printk(BIOS_DEBUG, "SMI1 command\n");
  43                         data = RCBA32(0x1e18);
  44                         data &= mask;
  45                         // if (smi1)
  46                         //      southbridge_smi_command(data);
  47                         // return;
  48                 }
  49                 // Fall through to debug
  50         }
  51
  52         printk(BIOS_DEBUG, "  trapped io address = 0x%x\n", trap_cycle & 0xfffc);
  53         for (i=0; i < 4; i++) if (IOTRAP(i)) printk(BIOS_DEBUG, "  TRAP = %d\n", i);
  54         printk(BIOS_DEBUG, "  AHBE = %x\n", (trap_cycle >> 16) & 0xf);
  55         printk(BIOS_DEBUG, "  MASK = 0x%08x\n", mask);
  56         printk(BIOS_DEBUG, "  read/write: %s\n", (trap_cycle & (1 << 24)) ? "read" : "write");
  57
  58         if (!(trap_cycle & (1 << 24))) {
  59                 /* Write Cycle */
  60                 data = RCBA32(0x1e18);
  61                 printk(BIOS_DEBUG, "  iotrap written data = 0x%08x\n", data);
  62         }
  63 #undef IOTRAP
  64 }
  65
  66 void southbridge_finalize_all(void)
  67 {
  68 }