mb/clevo/cml-u/dt: Make use of chipset devicetree
[coreboot.git] / src / soc / intel / broadwell / pei_data.c
blobdb33966c4c1b4a085fe7fd8e0e5fd76da8d627ad
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <console/streams.h>
4 #include <device/device.h>
5 #include <soc/iomap.h>
6 #include <soc/pei_data.h>
7 #include <soc/pei_wrapper.h>
8 #include <soc/intel/broadwell/chip.h>
10 static void ABI_X86 send_to_console(unsigned char b)
12 console_tx_byte(b);
15 void broadwell_fill_pei_data(struct pei_data *pei_data)
17 const struct soc_intel_broadwell_config *cfg = config_of_soc();
19 pei_data->pei_version = PEI_VERSION;
20 pei_data->board_type = BOARD_TYPE_ULT;
21 pei_data->usbdebug = CONFIG(USBDEBUG);
22 pei_data->pciexbar = CONFIG_ECAM_MMCONF_BASE_ADDRESS;
23 pei_data->smbusbar = CONFIG_FIXED_SMBUS_IO_BASE;
24 pei_data->ehcibar = CONFIG_EHCI_BAR;
25 pei_data->xhcibar = 0xd7000000;
26 pei_data->gttbar = 0xe0000000;
27 pei_data->pmbase = ACPI_BASE_ADDRESS;
28 pei_data->gpiobase = GPIO_BASE_ADDRESS;
29 pei_data->tseg_size = CONFIG_SMM_TSEG_SIZE;
30 pei_data->temp_mmio_base = 0xfed08000;
31 pei_data->ec_present = cfg->ec_present,
32 pei_data->dq_pins_interleaved = cfg->dq_pins_interleaved,
33 pei_data->tx_byte = &send_to_console;
34 pei_data->ddr_refresh_2x = 1;