mb/google/nissa/var/glassway: Add convertible and clamshell WIFI SAR FW_CONFIG ids
[coreboot.git] / src / security / tpm / tss_errors.h
blobfc2bd87c2c76f5fa1a4a6b68ab0734ff3e61e47b
1 /* SPDX-License-Identifier: BSD-3-Clause */
3 /*
4 * TPM error codes.
6 * Copy-pasted and lightly edited from TCG TPM Main Part 2 TPM Structures
7 * Version 1.2 Level 2 Revision 116 1 March 2011.
8 */
10 #ifndef TSS_ERRORS_H_
11 #define TSS_ERRORS_H_
13 #include <stdint.h>
15 typedef uint32_t tpm_result_t;
16 #define TPM_Vendor_Specific32 0x400
18 #define TPM_BASE 0x0
20 #define TPM_NON_FATAL (0x800 + TPM_BASE)
21 #define TPM_CB_ERROR TPM_Vendor_Specific32
23 #define TPM_SUCCESS ((tpm_result_t) (TPM_BASE + 0x00))
24 #define TPM_BADINDEX ((tpm_result_t) (TPM_BASE + 0x02))
25 #define TPM_BAD_PARAMETER ((tpm_result_t) (TPM_BASE + 0x03))
26 #define TPM_FAIL ((tpm_result_t) (TPM_BASE + 0x09))
27 #define TPM_OWNER_SET ((tpm_result_t) (TPM_BASE + 0x14))
28 #define TPM_IOERROR ((tpm_result_t) (TPM_BASE + 0x1F))
29 #define TPM_INVALID_POSTINIT ((tpm_result_t) (TPM_BASE + 0x26))
30 #define TPM_BAD_PRESENCE ((tpm_result_t) (TPM_BASE + 0x2D))
31 #define TPM_AREA_LOCKED ((tpm_result_t) (TPM_BASE + 0x3C))
32 #define TPM_MAXNVWRITES ((tpm_result_t) (TPM_BASE + 0x48))
34 #define TPM_RETRY ((tpm_result_t) (TPM_NON_FATAL + 0x00))
35 #define TPM_NEEDS_SELFTEST ((tpm_result_t) (TPM_NON_FATAL + 0x01))
36 #define TPM_DOING_SELFTEST ((tpm_result_t) (TPM_NON_FATAL + 0x02))
38 /* The following values are defind at the offset 0x480 which is a combination
39 * of the 32-bit vendor specific value from the TCG standard(0x400) and an
40 * offset of 0x80 to assist in identifying these return values when the 8-bit
41 * truncated value is used.
43 * Valid offset range is 128-255(0x80-0xFF)
46 #define TPM_CB_ALREADY_INITIALIZED ((tpm_result_t) (TPM_CB_ERROR + 0x80))
47 #define TPM_CB_INTERNAL_INCONSISTENCY ((tpm_result_t) (TPM_CB_ERROR + 0x81))
48 #define TPM_CB_MUST_REBOOT ((tpm_result_t) (TPM_CB_ERROR + 0x82))
49 #define TPM_CB_CORRUPTED_STATE ((tpm_result_t) (TPM_CB_ERROR + 0x83))
50 #define TPM_CB_COMMUNICATION_ERROR ((tpm_result_t) (TPM_CB_ERROR + 0x84))
51 #define TPM_CB_RESPONSE_TOO_LARGE ((tpm_result_t) (TPM_CB_ERROR + 0x85))
52 #define TPM_CB_NO_DEVICE ((tpm_result_t) (TPM_CB_ERROR + 0x86))
53 #define TPM_CB_INPUT_TOO_SMALL ((tpm_result_t) (TPM_CB_ERROR + 0x87))
54 #define TPM_CB_WRITE_FAILURE ((tpm_result_t) (TPM_CB_ERROR + 0x88))
55 #define TPM_CB_READ_EMPTY ((tpm_result_t) (TPM_CB_ERROR + 0x89))
56 #define TPM_CB_READ_FAILURE ((tpm_result_t) (TPM_CB_ERROR + 0x8A))
57 #define TPM_CB_NV_DEFINED ((tpm_result_t) (TPM_CB_ERROR + 0x8B))
58 #define TPM_CB_INVALID_ARG ((tpm_result_t) (TPM_CB_ERROR + 0x8C))
59 #define TPM_CB_HASH_ERROR ((tpm_result_t) (TPM_CB_ERROR + 0x8D))
60 #define TPM_CB_NO_SUCH_COMMAND ((tpm_result_t) (TPM_CB_ERROR + 0x8E))
61 #define TPM_CB_RANGE ((tpm_result_t) (TPM_CB_ERROR + 0x8F))
62 #define TPM_CB_FAIL ((tpm_result_t) (TPM_CB_ERROR + 0x90))
63 #define TPM_CB_TIMEOUT ((tpm_result_t) (TPM_CB_ERROR + 0x91))
64 #define TPM_CB_PROBE_FAILURE ((tpm_result_t) (TPM_CB_ERROR + 0x92))
66 #endif /* TSS_ERRORS_H_ */