Revert "soc/intel/adl: Guard TWL SoC missing UPDs for build integrity"
[coreboot.git] / src / mainboard / starlabs / starbook / variants / kbl / romstage.c
blob30d7c14ef5468bdab33d32484fb44f9f0fe1fec5
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <soc/romstage.h>
4 #include <spd_bin.h>
5 #include <string.h>
6 #include <types.h>
8 void mainboard_memory_init_params(FSPM_UPD *mupd)
10 FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig;
11 const u16 rcomp_resistor[] = {121, 81, 100};
12 const u16 rcomp_target[] = {100, 40, 20, 20, 26};
14 memcpy(&mem_cfg->RcompResistor, rcomp_resistor, sizeof(rcomp_resistor));
15 memcpy(&mem_cfg->RcompTarget, rcomp_target, sizeof(rcomp_target));
17 mem_cfg->MemorySpdPtr00 = spd_cbfs_map(6);
18 mem_cfg->MemorySpdPtr10 = mem_cfg->MemorySpdPtr00;
19 mem_cfg->MemorySpdDataLen = CONFIG_DIMM_SPD_SIZE;