ec/google/chromeec: Optimize battery string readout with caching
[coreboot.git] / src / mainboard / lenovo / t420s / devicetree.cb
blobb35888506958f06308b4516cae3fde56d50d5757
1 chip northbridge/intel/sandybridge
2 # IGD Displays
3 register "gfx" = "GMA_STATIC_DISPLAYS(1)"
5 # Enable DisplayPort Hotplug with 6ms pulse
6 register "gpu_dp_d_hotplug" = "0x06"
8 # Enable Panel as LVDS and configure power delays
9 register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
10 register "gpu_panel_power_cycle_delay" = "1"
11 register "gpu_panel_power_up_delay" = "300" # T1+T2: 30ms
12 register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms
13 register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
14 register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
15 register "gpu_cpu_backlight" = "0x1155"
16 register "gpu_pch_backlight" = "0x06100610"
18 register "spd_addresses" = "{0x50, 0, 0x51, 0}"
19 chip cpu/intel/model_206ax
20 # Values obtained from vendor BIOS
21 register "pp0_psi[VR12_PSI2]" = "{VR12_ALL_PHASES, 5}"
22 register "pp0_psi[VR12_PSI3]" = "{VR12_ALL_PHASES, 1}"
23 register "pp1_psi[VR12_PSI2]" = "{VR12_ALL_PHASES, 5}"
24 register "pp1_psi[VR12_PSI3]" = "{VR12_ALL_PHASES, 1}"
25 device cpu_cluster 0 on end
26 end
27 device domain 0 on
28 subsystemid 0x17aa 0x21d2 inherit
30 device ref host_bridge on end # host bridge
31 device ref peg10 on end # NVIDIA Copcie_rporation GF119M [NVS 4200M]
32 device ref igd on
33 subsystemid 0x17aa 0x21d3
34 end # Integrated Graphics Controller
36 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
37 # GPI routing
38 # 0 No effect (default)
39 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
40 # 2 SCI (if corresponding GPIO_EN bit is also set)
41 register "alt_gp_smi_en" = "0x0000"
42 register "gpi1_routing" = "2"
43 register "gpi13_routing" = "2"
45 # Enable SATA ports 0 (HDD bay) & 1 (ODD bay) & 2 (mSATA) & 4 (dock)
46 register "sata_port_map" = "0x17"
47 # Set max SATA speed to 6.0 Gb/s
48 register "sata_interface_speed_support" = "0x3"
50 register "gen1_dec" = "0x7c1601"
51 register "gen2_dec" = "0x0c15e1"
52 register "gen4_dec" = "0x0c06a1"
54 register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
56 # Enable zero-based linear PCIe root port functions
57 register "pcie_port_coalesce" = "true"
59 # device specific SPI configuration
60 register "spi_uvscc" = "0x2005"
61 register "spi_lvscc" = "0x2005"
63 register "usb_port_config" = "{
64 {0, 1, -1}, /* P0: empty */
65 {1, 1, 1}, /* P1: system port 2 (To system port) (EHCI debug), OC 1 */
66 {1, 1, -1}, /* P2: HALF MINICARD (WLAN) no oc */
67 {1, 0, -1}, /* P3: WWAN, no OC */
68 {1, 1, -1}, /* P4: smartcard, no OC */
69 {1, 1, -1}, /* P5: ExpressCard, no OC */
70 {0, 0, -1}, /* P6: empty */
71 {0, 0, -1}, /* P7: empty */
72 {0, 1, -1}, /* P8: empty (touch panel) */
73 {1, 0, 5}, /* P9: system port 1 (To USBAO) (EHCI debug), OC 5 */
74 {1, 0, -1}, /* P10: fingerprint reader, no OC */
75 {1, 1, -1}, /* P11: bluetooth, no OC. */
76 {1, 1, -1}, /* P12: docking, no OC */
77 {1, 1, -1} /* P13: camera (LCD), no OC */
80 device ref mei1 on end # Management Engine Interface 1
81 device ref mei2 off end # Management Engine Interface 2
82 device ref me_ide_r off end # Management Engine IDE-R
83 device ref me_kt off end # Management Engine KT
84 device ref gbe on
85 subsystemid 0x17aa 0x21ce
86 end # Intel Gigabit Ethernet
87 device ref ehci2 on end # USB Enhanced Host Controller #2
88 device ref hda on end # High Definition Audio Controller
89 device ref pcie_rp1 off end # PCIe Port #1
90 device ref pcie_rp2 on end # PCIe Port #2 Integrated Wireless LAN
91 device ref pcie_rp3 off end # PCIe Port #3
92 device ref pcie_rp4 on
93 smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
94 end # PCIe Port #4 ExpressCard
95 device ref pcie_rp5 on end # PCIe Port #5 NEC Corporation uPD720200A USB 3.0 Host Controller
96 device ref pcie_rp6 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe)
97 device ref pcie_rp7 off end # PCIe Port #7
98 device ref pcie_rp8 off end # PCIe Port #8
99 device ref ehci1 on end # USB Enhanced Host Controller #1
100 device ref pci_bridge off end # PCI bridge
101 device ref lpc on
102 chip ec/lenovo/pmh7
103 device pnp ff.1 on end # dummy
104 register "backlight_enable" = "true"
105 register "dock_event_enable" = "true"
108 chip drivers/pc80/tpm
109 device pnp 0c31.0 on end
112 chip ec/lenovo/h8
113 device pnp ff.2 on # dummy
114 io 0x60 = 0x62
115 io 0x62 = 0x66
116 io 0x64 = 0x1600
117 io 0x66 = 0x1604
120 register "config0" = "0xa7"
121 register "config1" = "0x01"
122 register "config2" = "0xa0"
123 register "config3" = "0xe2"
125 register "has_keyboard_backlight" = "0"
127 register "beepmask0" = "0x02"
128 register "beepmask1" = "0x86"
129 register "has_power_management_beeps" = "1"
130 register "event2_enable" = "0xff"
131 register "event3_enable" = "0xff"
132 register "event4_enable" = "0xf0"
133 register "event5_enable" = "0x3c"
134 register "event6_enable" = "0x00"
135 register "event7_enable" = "0xa1"
136 register "event8_enable" = "0x7b"
137 register "event9_enable" = "0xff"
138 register "eventa_enable" = "0x00"
139 register "eventb_enable" = "0x00"
140 register "eventc_enable" = "0xff"
141 register "eventd_enable" = "0xff"
142 register "evente_enable" = "0x0d"
144 register "has_bdc_detection" = "1"
145 register "bdc_gpio_num" = "54"
146 register "bdc_gpio_lvl" = "0"
148 chip drivers/lenovo/hybrid_graphics
149 device pnp ff.f on end # dummy
151 register "detect_gpio" = "21"
153 register "has_panel_hybrid_gpio" = "1"
154 register "panel_hybrid_gpio" = "52"
155 register "panel_integrated_lvl" = "1"
157 register "has_backlight_gpio" = "0"
158 register "has_dgpu_power_gpio" = "0"
160 register "has_thinker1" = "1"
162 end # LPC Controller
163 device ref sata1 on end # 6 port SATA AHCI Controller
164 device ref smbus on
165 # eeprom, 8 virtual devices, same chip
166 chip drivers/i2c/at24rf08c
167 device i2c 54 on end
168 device i2c 55 on end
169 device i2c 56 on end
170 device i2c 57 on end
171 device i2c 5c on end
172 device i2c 5d on end
173 device i2c 5e on end
174 device i2c 5f on end
176 end # SMBus Controller
177 device ref sata2 off end # SATA Controller 2
178 device ref thermal on end # Thermal