stoneyridge: Enable legacy IO
[coreboot.git] / src / include / rules.h
blobdeea50b977fdacca9fcc376f4a6dacb447de0658
1 /*
2 * This file is part of the coreboot project.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #ifndef _RULES_H
16 #define _RULES_H
18 /* Useful helpers to tell whether the code is executing in bootblock,
19 * romstage, ramstage or SMM.
22 #if defined(__DECOMPRESSOR__)
23 #define ENV_DECOMPRESSOR 1
24 #define ENV_BOOTBLOCK 0
25 #define ENV_ROMSTAGE 0
26 #define ENV_RAMSTAGE 0
27 #define ENV_SMM 0
28 #define ENV_VERSTAGE 0
29 #define ENV_RMODULE 0
30 #define ENV_POSTCAR 0
31 #define ENV_LIBAGESA 0
32 #define ENV_STRING "decompressor"
34 #elif defined(__BOOTBLOCK__)
35 #define ENV_DECOMPRESSOR 0
36 #define ENV_BOOTBLOCK 1
37 #define ENV_ROMSTAGE 0
38 #define ENV_RAMSTAGE 0
39 #define ENV_SMM 0
40 #define ENV_VERSTAGE 0
41 #define ENV_RMODULE 0
42 #define ENV_POSTCAR 0
43 #define ENV_LIBAGESA 0
44 #define ENV_STRING "bootblock"
46 #elif defined(__ROMSTAGE__)
47 #define ENV_DECOMPRESSOR 0
48 #define ENV_BOOTBLOCK 0
49 #define ENV_ROMSTAGE 1
50 #define ENV_RAMSTAGE 0
51 #define ENV_SMM 0
52 #define ENV_VERSTAGE 0
53 #define ENV_RMODULE 0
54 #define ENV_POSTCAR 0
55 #define ENV_LIBAGESA 0
56 #define ENV_STRING "romstage"
58 #elif defined(__SMM__)
59 #define ENV_DECOMPRESSOR 0
60 #define ENV_BOOTBLOCK 0
61 #define ENV_ROMSTAGE 0
62 #define ENV_RAMSTAGE 0
63 #define ENV_SMM 1
64 #define ENV_VERSTAGE 0
65 #define ENV_RMODULE 0
66 #define ENV_POSTCAR 0
67 #define ENV_LIBAGESA 0
68 #define ENV_STRING "smm"
70 #elif defined(__VERSTAGE__)
71 #define ENV_DECOMPRESSOR 0
72 #define ENV_BOOTBLOCK 0
73 #define ENV_ROMSTAGE 0
74 #define ENV_RAMSTAGE 0
75 #define ENV_SMM 0
76 #define ENV_VERSTAGE 1
77 #define ENV_RMODULE 0
78 #define ENV_POSTCAR 0
79 #define ENV_LIBAGESA 0
80 #define ENV_STRING "verstage"
82 #elif defined(__RAMSTAGE__)
83 #define ENV_DECOMPRESSOR 0
84 #define ENV_BOOTBLOCK 0
85 #define ENV_ROMSTAGE 0
86 #define ENV_RAMSTAGE 1
87 #define ENV_SMM 0
88 #define ENV_VERSTAGE 0
89 #define ENV_RMODULE 0
90 #define ENV_POSTCAR 0
91 #define ENV_LIBAGESA 0
92 #define ENV_STRING "ramstage"
94 #elif defined(__RMODULE__)
95 #define ENV_DECOMPRESSOR 0
96 #define ENV_BOOTBLOCK 0
97 #define ENV_ROMSTAGE 0
98 #define ENV_RAMSTAGE 0
99 #define ENV_SMM 0
100 #define ENV_VERSTAGE 0
101 #define ENV_RMODULE 1
102 #define ENV_POSTCAR 0
103 #define ENV_LIBAGESA 0
104 #define ENV_STRING "rmodule"
106 #elif defined(__POSTCAR__)
107 #define ENV_DECOMPRESSOR 0
108 #define ENV_BOOTBLOCK 0
109 #define ENV_ROMSTAGE 0
110 #define ENV_RAMSTAGE 0
111 #define ENV_SMM 0
112 #define ENV_VERSTAGE 0
113 #define ENV_RMODULE 0
114 #define ENV_POSTCAR 1
115 #define ENV_LIBAGESA 0
116 #define ENV_STRING "postcar"
118 #elif defined(__LIBAGESA__)
119 #define ENV_DECOMPRESSOR 0
120 #define ENV_BOOTBLOCK 0
121 #define ENV_ROMSTAGE 0
122 #define ENV_RAMSTAGE 0
123 #define ENV_SMM 0
124 #define ENV_VERSTAGE 0
125 #define ENV_RMODULE 0
126 #define ENV_POSTCAR 0
127 #define ENV_LIBAGESA 1
128 #define ENV_STRING "libagesa"
130 #else
132 * Default case of nothing set for random blob generation using
133 * create_class_compiler that isn't bound to a stage.
135 #define ENV_DECOMPRESSOR 0
136 #define ENV_BOOTBLOCK 0
137 #define ENV_ROMSTAGE 0
138 #define ENV_RAMSTAGE 0
139 #define ENV_SMM 0
140 #define ENV_VERSTAGE 0
141 #define ENV_RMODULE 0
142 #define ENV_POSTCAR 0
143 #define ENV_LIBAGESA 0
144 #define ENV_STRING "UNKNOWN"
145 #endif
147 /* Define helpers about the current architecture, based on toolchain.inc. */
149 #if defined(__ARCH_arm__)
150 #define ENV_ARM 1
151 #define ENV_ARM64 0
152 #if __COREBOOT_ARM_ARCH__ == 4
153 #define ENV_ARMV4 1
154 #define ENV_ARMV7 0
155 #elif __COREBOOT_ARM_ARCH__ == 7
156 #define ENV_ARMV4 0
157 #define ENV_ARMV7 1
158 #if defined(__COREBOOT_ARM_V7_A__)
159 #define ENV_ARMV7_A 1
160 #define ENV_ARMV7_M 0
161 #define ENV_ARMV7_R 0
162 #elif defined(__COREBOOT_ARM_V7_M__)
163 #define ENV_ARMV7_A 0
164 #define ENV_ARMV7_M 1
165 #define ENV_ARMV7_R 0
166 #elif defined(__COREBOOT_ARM_V7_R__)
167 #define ENV_ARMV7_A 0
168 #define ENV_ARMV7_M 0
169 #define ENV_ARMV7_R 1
170 #endif
171 #else
172 #define ENV_ARMV4 0
173 #define ENV_ARMV7 0
174 #endif
175 #define ENV_ARMV8 0
176 #define ENV_MIPS 0
177 #define ENV_RISCV 0
178 #define ENV_X86 0
179 #define ENV_X86_32 0
180 #define ENV_X86_64 0
182 #elif defined(__ARCH_arm64__)
183 #define ENV_ARM 0
184 #define ENV_ARM64 1
185 #define ENV_ARMV4 0
186 #define ENV_ARMV7 0
187 #if __COREBOOT_ARM_ARCH__ == 8
188 #define ENV_ARMV8 1
189 #else
190 #define ENV_ARMV8 0
191 #endif
192 #define ENV_MIPS 0
193 #define ENV_RISCV 0
194 #define ENV_X86 0
195 #define ENV_X86_32 0
196 #define ENV_X86_64 0
198 #elif defined(__ARCH_mips__)
199 #define ENV_ARM 0
200 #define ENV_ARM64 0
201 #define ENV_ARMV4 0
202 #define ENV_ARMV7 0
203 #define ENV_ARMV8 0
204 #define ENV_MIPS 1
205 #define ENV_RISCV 0
206 #define ENV_X86 0
207 #define ENV_X86_32 0
208 #define ENV_X86_64 0
210 #elif defined(__ARCH_riscv__)
211 #define ENV_ARM 0
212 #define ENV_ARM64 0
213 #define ENV_ARMV4 0
214 #define ENV_ARMV7 0
215 #define ENV_ARMV8 0
216 #define ENV_MIPS 0
217 #define ENV_RISCV 1
218 #define ENV_X86 0
219 #define ENV_X86_32 0
220 #define ENV_X86_64 0
222 #elif defined(__ARCH_x86_32__)
223 #define ENV_ARM 0
224 #define ENV_ARM64 0
225 #define ENV_ARMV4 0
226 #define ENV_ARMV7 0
227 #define ENV_ARMV8 0
228 #define ENV_MIPS 0
229 #define ENV_RISCV 0
230 #define ENV_X86 1
231 #define ENV_X86_32 1
232 #define ENV_X86_64 0
234 #elif defined(__ARCH_x86_64__)
235 #define ENV_ARM 0
236 #define ENV_ARM64 0
237 #define ENV_ARMV4 0
238 #define ENV_ARMV7 0
239 #define ENV_ARMV8 0
240 #define ENV_MIPS 0
241 #define ENV_RISCV 0
242 #define ENV_X86 1
243 #define ENV_X86_32 0
244 #define ENV_X86_64 1
246 #else
247 #define ENV_ARM 0
248 #define ENV_ARM64 0
249 #define ENV_ARMV4 0
250 #define ENV_ARMV7 0
251 #define ENV_ARMV8 0
252 #define ENV_MIPS 0
253 #define ENV_RISCV 0
254 #define ENV_X86 0
255 #define ENV_X86_32 0
256 #define ENV_X86_64 0
258 #endif
261 * For pre-DRAM stages and post-CAR always build with simple device model, ie.
262 * PCI, PNP and CPU functions operate without use of devicetree. The reason
263 * post-CAR utilizes __SIMPLE_DEVICE__ is for simplicity. Currently there's
264 * no known requirement that devicetree would be needed during that stage.
266 * For ramstage individual source file may define __SIMPLE_DEVICE__
267 * before including any header files to force that particular source
268 * be built with simple device model.
270 * For now only x86 is supported.
273 #if ENV_X86 && (defined(__PRE_RAM__) || ENV_SMM || ENV_POSTCAR)
274 #define __SIMPLE_DEVICE__
275 #endif
277 /* x86 specific. Indicates that the current stage is running with cache-as-ram
278 * enabled from the beginning of the stage in C code. */
279 #if defined(__PRE_RAM__)
280 #define ENV_CACHE_AS_RAM IS_ENABLED(CONFIG_CACHE_AS_RAM)
281 #else
282 #define ENV_CACHE_AS_RAM 0
283 #endif
285 #endif /* _RULES_H */