src/southbridge/sis/sis966/bootblock.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2004 Tyan Computer
   5  * Written by Yinghai Lu <yhlu@tyan.com> for Tyan Computer.
   6  * Copyright (C) 2006,2007 AMD
   7  * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
   8  * Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS)
   9  * Written by Morgan Tsai <my_tsai@sis.com> for SiS.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or
  14  * (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  24  */
  25
  26 #include <stdint.h>
  27 #include <arch/io.h>
  28 #include <device/pci_ids.h>
  29 #include "sis966.h"
  30
  31 static void sis966_enable_rom(void)
  32 {
  33         pci_devfn_t addr;
  34
  35         /* Enable 4MB ROM access at 0xFFC00000 - 0xFFFFFFFF. */
  36         addr = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SIS,
  37                                         PCI_DEVICE_ID_SIS_SIS966_LPC), 0);
  38
  39         /* Set the 4MB enable bit(s). */
  40         pci_write_config8(addr, 0x40, pci_read_config8(addr, 0x40) | 0x11);
  41 }
  42
  43 static void bootblock_southbridge_init(void)
  44 {
  45         sis966_enable_rom();
  46 }