soc/intel/broadwell: Clean up the bootflow
[coreboot.git] / configs / config.google_reef_cros
blob82b9b5234e57af746a553ffc79bd49602451c539
1 CONFIG_USE_BLOBS=y
2 CONFIG_VENDOR_GOOGLE=y
3 CONFIG_BOARD_GOOGLE_REEF=y
4 CONFIG_CHROMEOS=y
5 CONFIG_ADD_FSP_BINARIES=y
6 CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE=y
7 CONFIG_ELOG_GSMI=y
8 CONFIG_ELOG_BOOT_COUNT=y
9 CONFIG_ELOG_BOOT_COUNT_CMOS_OFFSET=144
10 CONFIG_SPI_FLASH_SMM=y
11 # CONFIG_CONSOLE_SERIAL is not set
12 CONFIG_CMOS_POST=y
13 CONFIG_CMOS_POST_OFFSET=0x70
14 CONFIG_CMOS_POST_EXTRA=y
15 CONFIG_PAYLOAD_NONE=y