1 /* SPDX-License-Identifier: GPL-2.0-only */
4 #include <console/console.h>
7 #include <intelblocks/pmclib.h>
8 #include <soc/pci_devs.h>
11 static void pch_log_gpio_gpe(u32 gpe0_sts
, u32 gpe0_en
, int start
)
17 for (i
= 0; i
<= 31; i
++) {
18 if (gpe0_sts
& (1 << i
))
19 elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO
, i
+ start
);
23 static void pch_log_wake_source(struct chipset_power_state
*ps
)
26 if (ps
->pm1_sts
& PWRBTN_STS
)
27 elog_add_event_wake(ELOG_WAKE_SOURCE_PWRBTN
, 0);
30 if (ps
->pm1_sts
& RTC_STS
)
31 elog_add_event_wake(ELOG_WAKE_SOURCE_RTC
, 0);
33 /* PCI Express (TODO: determine wake device) */
34 if (ps
->pm1_sts
& PCIEXPWAK_STS
)
35 elog_add_event_wake(ELOG_WAKE_SOURCE_PCIE
, 0);
37 /* PME (TODO: determine wake device) */
38 if (ps
->gpe0_sts
[GPE_STD
] & PME_STS
)
39 elog_add_event_wake(ELOG_WAKE_SOURCE_PME
, 0);
41 /* Internal PME (TODO: determine wake device) */
42 if (ps
->gpe0_sts
[GPE_STD
] & PME_B0_STS
)
43 elog_add_event_wake(ELOG_WAKE_SOURCE_PME_INTERNAL
, 0);
46 if (ps
->gpe0_sts
[GPE_STD
] & SMB_WAK_STS
)
47 elog_add_event_wake(ELOG_WAKE_SOURCE_SMBUS
, 0);
49 /* Log GPIO events in set 1-3 */
50 pch_log_gpio_gpe(ps
->gpe0_sts
[GPE_31_0
], ps
->gpe0_en
[GPE_31_0
], 0);
51 pch_log_gpio_gpe(ps
->gpe0_sts
[GPE_63_32
], ps
->gpe0_en
[GPE_63_32
], 32);
52 pch_log_gpio_gpe(ps
->gpe0_sts
[GPE_95_64
], ps
->gpe0_en
[GPE_95_64
], 64);
53 /* Treat the STD as an extension of GPIO to obtain visibility. */
54 pch_log_gpio_gpe(ps
->gpe0_sts
[GPE_STD
], ps
->gpe0_en
[GPE_STD
], 96);
57 static void pch_log_power_and_resets(struct chipset_power_state
*ps
)
60 if (ps
->gblrst_cause
[0] & GBLRST_CAUSE0_THERMTRIP
)
61 elog_add_event(ELOG_TYPE_THERM_TRIP
);
63 /* CSME-Initiated Host Reset with power down */
64 if (ps
->hpr_cause0
& HPR_CAUSE0_MI_HRPD
)
65 elog_add_event(ELOG_TYPE_MI_HRPD
);
67 /* CSME-Initiated Host Reset with power cycle */
68 if (ps
->hpr_cause0
& HPR_CAUSE0_MI_HRPC
)
69 elog_add_event(ELOG_TYPE_MI_HRPC
);
71 /* CSME-Initiated Host Reset without power cycle */
72 if (ps
->hpr_cause0
& HPR_CAUSE0_MI_HR
)
73 elog_add_event(ELOG_TYPE_MI_HR
);
75 /* PWR_FLR Power Failure */
76 if (ps
->gen_pmcon_a
& PWR_FLR
)
77 elog_add_event(ELOG_TYPE_POWER_FAIL
);
79 /* SUS Well Power Failure */
80 if (ps
->gen_pmcon_a
& SUS_PWR_FLR
)
81 elog_add_event(ELOG_TYPE_SUS_POWER_FAIL
);
84 if (ps
->prev_sleep_state
!= ACPI_S3
&&
85 ps
->tco2_sts
& TCO_STS_SECOND_TO
)
86 elog_add_event(ELOG_TYPE_TCO_RESET
);
88 /* Power Button Override */
89 if (ps
->pm1_sts
& PRBTNOR_STS
)
90 elog_add_event(ELOG_TYPE_POWER_BUTTON_OVERRIDE
);
93 if (ps
->gen_pmcon_b
& RTC_BATTERY_DEAD
)
94 elog_add_event(ELOG_TYPE_RTC_RESET
);
96 /* Host Reset Status */
97 if (ps
->gen_pmcon_a
& HOST_RST_STS
)
98 elog_add_event(ELOG_TYPE_SYSTEM_RESET
);
100 /* ACPI Wake Event */
101 if (ps
->prev_sleep_state
!= ACPI_S0
)
102 elog_add_event_byte(ELOG_TYPE_ACPI_WAKE
, ps
->prev_sleep_state
);
105 static void pch_log_state(void *unused
)
107 struct chipset_power_state
*ps
= pmc_get_power_state();
110 printk(BIOS_ERR
, "chipset_power_state not found!\n");
114 /* Power and Reset */
115 pch_log_power_and_resets(ps
);
118 if (ps
->prev_sleep_state
> ACPI_S0
)
119 pch_log_wake_source(ps
);
122 BOOT_STATE_INIT_ENTRY(BS_DEV_INIT
, BS_ON_EXIT
, pch_log_state
, NULL
);
124 void elog_gsmi_cb_platform_log_wake_source(void)
126 struct chipset_power_state ps
;
127 pmc_fill_pm_reg_info(&ps
);
128 pch_log_wake_source(&ps
);