src/northbridge/amd/pi/agesawrapper.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2012 - 2014 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <AGESA.h>
  17 #include <cbfs.h>
  18 #include <cbmem.h>
  19 #include <delay.h>
  20 #include <cpu/x86/mtrr.h>
  21 #include <FchPlatform.h>
  22 #include <heapManager.h>
  23 #include <northbridge/amd/agesa/agesa_helper.h>
  24 #include <northbridge/amd/agesa/state_machine.h>
  25 #include <northbridge/amd/pi/agesawrapper.h>
  26 #include <northbridge/amd/agesa/BiosCallOuts.h>
  27
  28 void __weak OemPostParams(AMD_POST_PARAMS *PostParams) {}
  29
  30 #define FILECODE UNASSIGNED_FILE_FILECODE
  31
  32 AGESA_STATUS agesawrapper_amdinitreset(void)
  33 {
  34         AGESA_STATUS status;
  35         AMD_INTERFACE_PARAMS AmdParamStruct;
  36         AMD_RESET_PARAMS AmdResetParams;
  37
  38         LibAmdMemFill (&AmdParamStruct,
  39                        0,
  40                        sizeof(AMD_INTERFACE_PARAMS),
  41                        &(AmdParamStruct.StdHeader));
  42
  43         LibAmdMemFill (&AmdResetParams,
  44                        0,
  45                        sizeof(AMD_RESET_PARAMS),
  46                        &(AmdResetParams.StdHeader));
  47
  48         AmdParamStruct.AgesaFunctionName = AMD_INIT_RESET;
  49         AmdParamStruct.AllocationMethod = ByHost;
  50         AmdParamStruct.NewStructSize = sizeof(AMD_RESET_PARAMS);
  51         AmdParamStruct.NewStructPtr = &AmdResetParams;
  52         AmdParamStruct.StdHeader.AltImageBasePtr = 0;
  53         AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout;
  54         AmdParamStruct.StdHeader.Func = 0;
  55         AmdParamStruct.StdHeader.ImageBasePtr = 0;
  56         AmdCreateStruct (&AmdParamStruct);
  57
  58         AmdResetParams.FchInterface.Xhci0Enable = CONFIG(HUDSON_XHCI_ENABLE);
  59         if (CONFIG(SOUTHBRIDGE_AMD_PI_BOLTON))
  60                 AmdResetParams.FchInterface.Xhci1Enable = TRUE;
  61
  62         AmdResetParams.FchInterface.SataEnable = !((CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3));
  63         AmdResetParams.FchInterface.IdeEnable = (CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3);
  64
  65         status = AmdInitReset(&AmdResetParams);
  66         if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus);
  67         AmdReleaseStruct (&AmdParamStruct);
  68         return status;
  69 }
  70
  71 AGESA_STATUS agesawrapper_amdinitearly(void)
  72 {
  73         AGESA_STATUS status;
  74         AMD_INTERFACE_PARAMS AmdParamStruct;
  75         AMD_EARLY_PARAMS     *AmdEarlyParamsPtr;
  76
  77         LibAmdMemFill (&AmdParamStruct,
  78                        0,
  79                        sizeof(AMD_INTERFACE_PARAMS),
  80                        &(AmdParamStruct.StdHeader));
  81
  82         AmdParamStruct.AgesaFunctionName = AMD_INIT_EARLY;
  83         AmdParamStruct.AllocationMethod = PreMemHeap;
  84         AmdParamStruct.StdHeader.AltImageBasePtr = 0;
  85         AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout;
  86         AmdParamStruct.StdHeader.Func = 0;
  87         AmdParamStruct.StdHeader.ImageBasePtr = 0;
  88         AmdCreateStruct (&AmdParamStruct);
  89
  90         AmdEarlyParamsPtr = (AMD_EARLY_PARAMS *)AmdParamStruct.NewStructPtr;
  91         OemCustomizeInitEarly (AmdEarlyParamsPtr);
  92
  93         AmdEarlyParamsPtr->GnbConfig.PsppPolicy = PsppDisabled;
  94         status = AmdInitEarly ((AMD_EARLY_PARAMS *)AmdParamStruct.NewStructPtr);
  95         /*
  96          * init_timer() needs to be called on CZ PI, because AGESA resets the LAPIC reload value
  97          * on the AMD_INIT_EARLY call
  98          */
  99         if (CONFIG(CPU_AMD_PI_00660F01))
 100                 init_timer();
 101         if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus);
 102         AmdReleaseStruct (&AmdParamStruct);
 103
 104         return status;
 105 }
 106
 107 AGESA_STATUS agesawrapper_amdinitpost(void)
 108 {
 109         AGESA_STATUS status;
 110         AMD_INTERFACE_PARAMS  AmdParamStruct;
 111         AMD_POST_PARAMS       *PostParams;
 112
 113         LibAmdMemFill (&AmdParamStruct,
 114                        0,
 115                        sizeof(AMD_INTERFACE_PARAMS),
 116                        &(AmdParamStruct.StdHeader));
 117
 118         AmdParamStruct.AgesaFunctionName = AMD_INIT_POST;
 119         AmdParamStruct.AllocationMethod = PreMemHeap;
 120         AmdParamStruct.StdHeader.AltImageBasePtr = NULL;
 121         AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout;
 122         AmdParamStruct.StdHeader.Func = 0;
 123         AmdParamStruct.StdHeader.ImageBasePtr = 0;
 124
 125         AmdCreateStruct (&AmdParamStruct);
 126         PostParams = (AMD_POST_PARAMS *)AmdParamStruct.NewStructPtr;
 127
 128         PostParams->MemConfig.UmaMode = CONFIG(GFXUMA) ? UMA_AUTO : UMA_NONE;
 129         PostParams->MemConfig.UmaSize = 0;
 130         PostParams->MemConfig.BottomIo = (UINT16)
 131                                          (CONFIG_BOTTOMIO_POSITION >> 24);
 132
 133         OemPostParams(PostParams);
 134
 135         status = AmdInitPost (PostParams);
 136
 137         /* If UMA is enabled we currently have it below TOP_MEM as well.
 138          * UMA may or may not be cacheable, so Sub4GCacheTop could be
 139          * higher than UmaBase. With UMA_NONE we see UmaBase==0. */
 140         if (PostParams->MemConfig.UmaBase)
 141                 backup_top_of_low_cacheable(PostParams->MemConfig.UmaBase << 16);
 142         else
 143                 backup_top_of_low_cacheable(PostParams->MemConfig.Sub4GCacheTop);
 144
 145         printk(
 146                         BIOS_SPEW,
 147                         "setup_uma_memory: umamode %s\n",
 148                         (PostParams->MemConfig.UmaMode == UMA_AUTO) ? "UMA_AUTO" :
 149                         (PostParams->MemConfig.UmaMode == UMA_SPECIFIED) ? "UMA_SPECIFIED" :
 150                         (PostParams->MemConfig.UmaMode == UMA_NONE) ? "UMA_NONE" :
 151                         "unknown"
 152         );
 153         printk(
 154                         BIOS_SPEW,
 155                         "setup_uma_memory: syslimit 0x%08llX, bottomio 0x%08lx\n",
 156                         (unsigned long long)(PostParams->MemConfig.SysLimit) << 16,
 157                         (unsigned long)(PostParams->MemConfig.BottomIo) << 16
 158         );
 159         printk(
 160                         BIOS_SPEW,
 161                         "setup_uma_memory: uma size %luMB, uma start 0x%08lx\n",
 162                         (unsigned long)(PostParams->MemConfig.UmaSize) >> (20 - 16),
 163                         (unsigned long)(PostParams->MemConfig.UmaBase) << 16
 164         );
 165         if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(PostParams->StdHeader.HeapStatus);
 166         AmdReleaseStruct (&AmdParamStruct);
 167
 168         return status;
 169 }
 170
 171 AGESA_STATUS agesawrapper_amdinitenv(void)
 172 {
 173         AGESA_STATUS status;
 174         AMD_INTERFACE_PARAMS AmdParamStruct;
 175         AMD_ENV_PARAMS       *EnvParam;
 176
 177         /* Initialize heap space */
 178         EmptyHeap();
 179
 180         LibAmdMemFill (&AmdParamStruct,
 181                        0,
 182                        sizeof(AMD_INTERFACE_PARAMS),
 183                        &(AmdParamStruct.StdHeader));
 184
 185         AmdParamStruct.AgesaFunctionName = AMD_INIT_ENV;
 186         AmdParamStruct.AllocationMethod = PostMemDram;
 187         AmdParamStruct.StdHeader.AltImageBasePtr = 0;
 188         AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout;
 189         AmdParamStruct.StdHeader.Func = 0;
 190         AmdParamStruct.StdHeader.ImageBasePtr = 0;
 191         status = AmdCreateStruct (&AmdParamStruct);
 192         EnvParam = (AMD_ENV_PARAMS *)AmdParamStruct.NewStructPtr;
 193
 194         EnvParam->FchInterface.AzaliaController = AzEnable;
 195         EnvParam->FchInterface.SataClass = CONFIG_HUDSON_SATA_MODE;
 196         EnvParam->FchInterface.SataEnable = !((CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3));
 197         EnvParam->FchInterface.IdeEnable = (CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3);
 198         EnvParam->FchInterface.SataIdeMode = (CONFIG_HUDSON_SATA_MODE == 3);
 199
 200         status = AmdInitEnv (EnvParam);
 201         if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(EnvParam->StdHeader.HeapStatus);
 202         /* Initialize Subordinate Bus Number and Secondary Bus Number
 203          * In platform BIOS this address is allocated by PCI enumeration code
 204          Modify D1F0x18
 205         */
 206
 207         return status;
 208 }
 209
 210 AGESA_STATUS agesawrapper_amdinitmid(void)
 211 {
 212         AGESA_STATUS status;
 213         AMD_INTERFACE_PARAMS AmdParamStruct;
 214         AMD_MID_PARAMS *MidParam;
 215
 216         /* Enable MMIO on AMD CPU Address Map Controller */
 217         amd_initcpuio ();
 218
 219         LibAmdMemFill (&AmdParamStruct,
 220                        0,
 221                        sizeof(AMD_INTERFACE_PARAMS),
 222                        &(AmdParamStruct.StdHeader));
 223
 224         AmdParamStruct.AgesaFunctionName = AMD_INIT_MID;
 225         AmdParamStruct.AllocationMethod = PostMemDram;
 226         AmdParamStruct.StdHeader.AltImageBasePtr = 0;
 227         AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout;
 228         AmdParamStruct.StdHeader.Func = 0;
 229         AmdParamStruct.StdHeader.ImageBasePtr = 0;
 230
 231         AmdCreateStruct (&AmdParamStruct);
 232         MidParam = (AMD_MID_PARAMS *)AmdParamStruct.NewStructPtr;
 233
 234         MidParam->GnbMidConfiguration.iGpuVgaMode = 0;/* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */
 235         MidParam->GnbMidConfiguration.GnbIoapicAddress = 0xFEC20000;
 236
 237         MidParam->FchInterface.AzaliaController = AzEnable;
 238         MidParam->FchInterface.SataClass = CONFIG_HUDSON_SATA_MODE;
 239         MidParam->FchInterface.SataEnable = !((CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3));
 240         MidParam->FchInterface.IdeEnable = (CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3);
 241         MidParam->FchInterface.SataIdeMode = (CONFIG_HUDSON_SATA_MODE == 3);
 242
 243         status = AmdInitMid ((AMD_MID_PARAMS *)AmdParamStruct.NewStructPtr);
 244         if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus);
 245         AmdReleaseStruct (&AmdParamStruct);
 246
 247         return status;
 248 }
 249
 250 #ifndef __PRE_RAM__
 251 AGESA_STATUS agesawrapper_amdinitlate(void)
 252 {
 253         AGESA_STATUS Status;
 254         AMD_INTERFACE_PARAMS AmdParamStruct;
 255         AMD_LATE_PARAMS *AmdLateParams;
 256
 257         LibAmdMemFill (&AmdParamStruct,
 258                        0,
 259                        sizeof(AMD_INTERFACE_PARAMS),
 260                        &(AmdParamStruct.StdHeader));
 261
 262         AmdParamStruct.AgesaFunctionName = AMD_INIT_LATE;
 263         AmdParamStruct.AllocationMethod = PostMemDram;
 264         AmdParamStruct.StdHeader.AltImageBasePtr = 0;
 265         AmdParamStruct.StdHeader.CalloutPtr = &GetBiosCallout;
 266         AmdParamStruct.StdHeader.HeapStatus = HEAP_SYSTEM_MEM;
 267         AmdParamStruct.StdHeader.Func = 0;
 268         AmdParamStruct.StdHeader.ImageBasePtr = 0;
 269
 270         /* NOTE: if not call amdcreatestruct, the initializer(AmdInitLateInitializer) would not be called */
 271         AmdCreateStruct(&AmdParamStruct);
 272         AmdLateParams = (AMD_LATE_PARAMS *)AmdParamStruct.NewStructPtr;
 273         AmdLateParams->GnbLateConfiguration.GnbIoapicId = CONFIG_MAX_CPUS + 1;
 274         AmdLateParams->GnbLateConfiguration.FchIoapicId = CONFIG_MAX_CPUS;
 275         /* Code for creating CDIT requires hop count table. If it is not
 276          * present AGESA_ERROR is returned, which confuses users. CDIT is not
 277          * written to the ACPI tables anyway. */
 278         AmdLateParams->PlatformConfig.UserOptionCdit = 0;
 279
 280         Status = AmdInitLate(AmdLateParams);
 281         if (Status != AGESA_SUCCESS) {
 282                 agesawrapper_amdreadeventlog(AmdLateParams->StdHeader.HeapStatus);
 283                 ASSERT(Status == AGESA_SUCCESS);
 284         }
 285
 286         agesawrapper_setlateinitptr(AmdLateParams);
 287
 288         /* No AmdReleaseStruct(&AmdParamStruct), we need AmdLateParams later. */
 289         return Status;
 290 }
 291 #endif /* #ifndef __PRE_RAM__ */
 292
 293 const void *agesawrapper_locate_module (const CHAR8 name[8])
 294 {
 295         const void *agesa;
 296         const AMD_IMAGE_HEADER* image;
 297         const AMD_MODULE_HEADER* module;
 298         size_t file_size;
 299
 300         if (CONFIG(VBOOT)) {
 301                 /* Use phys. location in flash and prevent vboot from searching cbmem */
 302                 agesa = (void *)CONFIG_AGESA_BINARY_PI_LOCATION;
 303                 file_size = 0x100000;
 304         } else {
 305                 agesa = cbfs_boot_map_with_leak((const char *)CONFIG_AGESA_CBFS_NAME,
 306                                         CBFS_TYPE_RAW, &file_size);
 307         }
 308
 309         if (!agesa)
 310                 return NULL;
 311         image =  LibAmdLocateImage(agesa, agesa + file_size - 1, 4096, name);
 312         module = (AMD_MODULE_HEADER*)image->ModuleInfoOffset;
 313
 314         return module;
 315 }