libpayload: ipq808x: introduce uart driver
[coreboot.git] / src / southbridge / via / vt8235 / vt8235.c
blob0f37be2aee77694a709e0b099da82580a0ed426a
1 #include <console/console.h>
2 #include <device/device.h>
3 #include <device/pci.h>
4 #include <device/pci_ops.h>
5 #include <device/pci_ids.h>
6 #include <pc80/keyboard.h>
7 #include <pc80/i8259.h>
8 #include "chip.h"
10 static void keyboard_on(struct device *dev)
12 u8 regval;
14 regval = pci_read_config8(dev, 0x51);
15 regval |= 0x05;
16 regval &= 0xfd;
17 pci_write_config8(dev, 0x51, regval);
19 pc_keyboard_init();
22 #ifdef UNUSED_CODE
23 void dump_south(device_t dev0)
25 int i,j;
27 for(i = 0; i < 256; i += 16) {
28 printk(BIOS_DEBUG, "0x%x: ", i);
29 for(j = 0; j < 16; j++) {
30 printk(BIOS_DEBUG, "%02x ", pci_read_config8(dev0, i+j));
32 printk(BIOS_DEBUG, "\n");
36 void set_led(void)
38 // set power led to steady now that coreboot has virtually done its job
39 device_t dev;
40 dev = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, 0);
41 pci_write_config8(dev, 0x94, 0xb0);
43 #endif
45 static void vt8235_enable(struct device *dev)
47 u8 regval;
48 u16 vendor,model;
50 vendor = pci_read_config16(dev,0);
51 model = pci_read_config16(dev,0x2);
53 printk(BIOS_DEBUG, "In vt8235_enable %04x %04x.\n",vendor,model);
55 /* If this is not the southbridge itself just return.
56 * This is necessary because USB devices are slot 10, whereas this
57 * device is slot 11 therefore usb devices get called first during
58 * the bus scan. We don't want to wait until we could do dev->init
59 * because that's too late.
62 if( (vendor != PCI_VENDOR_ID_VIA) || (model != PCI_DEVICE_ID_VIA_8235))
63 return;
65 printk(BIOS_DEBUG, "Initialising Devices\n");
67 /* make sure interrupt controller is configured before keyboard init */
68 setup_i8259();
70 /* enable RTC and ethernet */
71 regval = pci_read_config8(dev, 0x51);
72 regval |= 0x18;
73 pci_write_config8(dev, 0x51, regval);
75 /* turn on keyboard */
76 keyboard_on(dev);
78 /* enable USB 1.1 & USB 2.0 - redundant really since we've
79 * already been there - see note above
81 regval = pci_read_config8(dev, 0x50);
82 regval &= ~(0x36);
83 pci_write_config8(dev, 0x50, regval);
86 struct chip_operations southbridge_via_vt8235_ops = {
87 CHIP_NAME("VIA VT8235 Southbridge")
88 .enable_dev = vt8235_enable,