src/soc/intel/apollolake/Makefile.inc

   1 ifeq ($(CONFIG_SOC_INTEL_APOLLOLAKE),y)
   2
   3 subdirs-y += ../../../cpu/intel/microcode
   4 subdirs-y += ../../../cpu/intel/turbo
   5 subdirs-y += ../../../cpu/x86/lapic
   6 subdirs-y += ../../../cpu/x86/mtrr
   7 subdirs-y += ../../../cpu/x86/smm
   8 subdirs-y += ../../../cpu/x86/tsc
   9 subdirs-y += ../../../cpu/x86/cache
  10
  11 bootblock-y += bootblock/bootblock.c
  12 bootblock-y += bootblock/cache_as_ram.S
  13 bootblock-y += bootblock/bootblock.c
  14 bootblock-y += car.c
  15 bootblock-y += gpio.c
  16 bootblock-y += lpc_lib.c
  17 bootblock-y += mmap_boot.c
  18 bootblock-y += placeholders.c
  19 bootblock-y += tsc_freq.c
  20 bootblock-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
  21
  22 romstage-y += placeholders.c
  23 romstage-y += car.c
  24 romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += romstage.c
  25 romstage-y += gpio.c
  26 romstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
  27 romstage-y += lpc_lib.c
  28 romstage-y += memmap.c
  29 romstage-y += meminit.c
  30 romstage-y += mmap_boot.c
  31 romstage-y += tsc_freq.c
  32 romstage-y += pmutil.c
  33
  34 smm-y += placeholders.c
  35 smm-y += pmutil.c
  36
  37 ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
  38 ramstage-y += cpu.c
  39 ramstage-y += chip.c
  40 ramstage-y += placeholders.c
  41 ramstage-y += gpio.c
  42 ramstage-y += graphics.c
  43 ramstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
  44 ramstage-y += lpc.c
  45 ramstage-y += lpc_lib.c
  46 ramstage-y += memmap.c
  47 ramstage-y += mmap_boot.c
  48 ramstage-y += uart.c
  49 ramstage-y += northbridge.c
  50 ramstage-y += spi.c
  51 ramstage-y += tsc_freq.c
  52 ramstage-y += pmutil.c
  53 ramstage-y += pmc.c
  54
  55 postcar-y += exit_car.S
  56 postcar-y += memmap.c
  57 postcar-y += mmap_boot.c
  58 postcar-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
  59 postcar-y += tsc_freq.c
  60
  61 CPPFLAGS_common += -I$(src)/soc/intel/apollolake/include
  62
  63 endif