src/southbridge/intel/bd82x6x/fadt.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <device/pci_ops.h>
   4 #include <acpi/acpi.h>
   5 #include <cpu/x86/smm.h>
   6 #include <southbridge/intel/common/pmutil.h>
   7 #include "chip.h"
   8
   9 void acpi_fill_fadt(acpi_fadt_t *fadt)
  10 {
  11         struct device *dev = pcidev_on_root(0x1f, 0);
  12         struct southbridge_intel_bd82x6x_config *chip = dev->chip_info;
  13         u16 pmbase = pci_read_config16(dev, 0x40) & 0xfffe;
  14
  15         fadt->sci_int = 0x9;
  16
  17         if (permanent_smi_handler()) {
  18                 fadt->smi_cmd = APM_CNT;
  19                 fadt->acpi_enable = APM_CNT_ACPI_ENABLE;
  20                 fadt->acpi_disable = APM_CNT_ACPI_DISABLE;
  21         }
  22
  23         fadt->pm1a_evt_blk = pmbase;
  24         fadt->pm1a_cnt_blk = pmbase + PM1_CNT;
  25         fadt->pm2_cnt_blk = pmbase + PM2_CNT;
  26         fadt->pm_tmr_blk = pmbase + PM1_TMR;
  27         fadt->gpe0_blk = pmbase + GPE0_STS;
  28
  29         fadt->pm1_evt_len = 4;
  30         fadt->pm1_cnt_len = 2;
  31         fadt->pm2_cnt_len = 1;
  32         fadt->pm_tmr_len = 4;
  33         fadt->gpe0_blk_len = 16;
  34         /* P_LVLx not used */
  35         fadt->p_lvl2_lat = 101;
  36         fadt->p_lvl3_lat = 1001;
  37         /* P_CNT not supported */
  38         fadt->duty_offset = 0;
  39         fadt->duty_width = 0;
  40         fadt->day_alrm = 0xd;
  41         fadt->mon_alrm = 0x00;
  42         fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
  43
  44         fadt->flags |= ACPI_FADT_WBINVD |
  45                         ACPI_FADT_C1_SUPPORTED |
  46                         ACPI_FADT_SLEEP_BUTTON |
  47                         ACPI_FADT_SEALED_CASE |
  48                         ACPI_FADT_S4_RTC_WAKE |
  49                         ACPI_FADT_PLATFORM_CLOCK;
  50         if (chip->docking_supported) {
  51                 fadt->flags |= ACPI_FADT_DOCKING_SUPPORTED;
  52         }
  53
  54         fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
  55         fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8;
  56         fadt->x_pm1a_evt_blk.bit_offset = 0;
  57         fadt->x_pm1a_evt_blk.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS;
  58         fadt->x_pm1a_evt_blk.addrl = pmbase;
  59         fadt->x_pm1a_evt_blk.addrh = 0x0;
  60
  61         fadt->x_pm1a_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
  62         fadt->x_pm1a_cnt_blk.bit_width = fadt->pm1_cnt_len * 8;
  63         fadt->x_pm1a_cnt_blk.bit_offset = 0;
  64         fadt->x_pm1a_cnt_blk.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS;
  65         fadt->x_pm1a_cnt_blk.addrl = pmbase + PM1_CNT;
  66         fadt->x_pm1a_cnt_blk.addrh = 0x0;
  67
  68         fadt->x_pm2_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
  69         fadt->x_pm2_cnt_blk.bit_width = fadt->pm2_cnt_len * 8;
  70         fadt->x_pm2_cnt_blk.bit_offset = 0;
  71         fadt->x_pm2_cnt_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
  72         fadt->x_pm2_cnt_blk.addrl = pmbase + PM2_CNT;
  73         fadt->x_pm2_cnt_blk.addrh = 0x0;
  74
  75         fadt->x_pm_tmr_blk.space_id = ACPI_ADDRESS_SPACE_IO;
  76         fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8;
  77         fadt->x_pm_tmr_blk.bit_offset = 0;
  78         fadt->x_pm_tmr_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS;
  79         fadt->x_pm_tmr_blk.addrl = pmbase + PM1_TMR;
  80         fadt->x_pm_tmr_blk.addrh = 0x0;
  81
  82         fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO;
  83         fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8;
  84         fadt->x_gpe0_blk.bit_offset = 0;
  85         fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
  86         fadt->x_gpe0_blk.addrl = fadt->gpe0_blk;
  87         fadt->x_gpe0_blk.addrh = 0x0;
  88 }