src/soc/intel/alderlake/bootblock/report_platform.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 /*
   4  * This file is created based on Intel Alder Lake Platform Stepping and IDs
   5  * Document number: 619362, 619501
   6  * Chapter number: 2, 14
   7  */
   8
   9 #include <commonlib/helpers.h>
  10 #include <console/console.h>
  11 #include <cpu/cpu.h>
  12 #include <cpu/intel/cpu_ids.h>
  13 #include <cpu/intel/microcode.h>
  14 #include <cpu/x86/msr.h>
  15 #include <cpu/x86/name.h>
  16 #include <device/pci.h>
  17 #include <device/pci_ids.h>
  18 #include <device/pci_ops.h>
  19 #include <soc/bootblock.h>
  20 #include <soc/pci_devs.h>
  21
  22 static struct {
  23         u32 cpuid;
  24         const char *name;
  25 } cpu_table[] = {
  26         { CPUID_ALDERLAKE_J0, "Alderlake J0 Platform" },
  27         { CPUID_ALDERLAKE_K0, "Alderlake K0 Platform" },
  28         { CPUID_ALDERLAKE_L0, "Alderlake L0 Platform" },
  29         { CPUID_ALDERLAKE_Q0, "Alderlake Q0 Platform" },
  30         { CPUID_ALDERLAKE_R0, "Alderlake R0 Platform" },
  31         { CPUID_ALDERLAKE_N_A0, "Alderlake-N Platform" },
  32         { CPUID_ALDERLAKE_A0, "Alderlake A0 Platform" },
  33         { CPUID_ALDERLAKE_B0, "Alderlake B0 Platform" },
  34         { CPUID_ALDERLAKE_C0, "Alderlake C0 Platform" },
  35         { CPUID_ALDERLAKE_G0, "Alderlake G0 Platform" },
  36         { CPUID_ALDERLAKE_H0, "Alderlake H0 Platform" },
  37         { CPUID_RAPTORLAKE_A0, "Raptorlake A0 Platform" },
  38         { CPUID_RAPTORLAKE_B0, "Raptorlake B0 Platform" },
  39         { CPUID_RAPTORLAKE_C0, "Raptorlake C0 Platform" },
  40         { CPUID_RAPTORLAKE_H0, "Raptorlake H0 Platform" },
  41         { CPUID_RAPTORLAKE_J0, "Raptorlake J0 Platform" },
  42         { CPUID_RAPTORLAKE_Q0, "Raptorlake Q0 Platform" },
  43 };
  44
  45 static struct {
  46         u16 mchid;
  47         const char *name;
  48 } mch_table[] = {
  49         { PCI_DID_INTEL_ADL_P_ID_1, "Alderlake-P" },
  50         { PCI_DID_INTEL_ADL_P_ID_3, "Alderlake-P" },
  51         { PCI_DID_INTEL_ADL_P_ID_4, "Alderlake-P" },
  52         { PCI_DID_INTEL_ADL_P_ID_5, "Alderlake-P" },
  53         { PCI_DID_INTEL_ADL_P_ID_6, "Alderlake-P" },
  54         { PCI_DID_INTEL_ADL_P_ID_7, "Alderlake-P" },
  55         { PCI_DID_INTEL_ADL_P_ID_8, "Alderlake-P" },
  56         { PCI_DID_INTEL_ADL_P_ID_9, "Alderlake-P" },
  57         { PCI_DID_INTEL_ADL_P_ID_10, "Alderlake-P" },
  58         { PCI_DID_INTEL_ADL_M_ID_1, "Alderlake-M" },
  59         { PCI_DID_INTEL_ADL_M_ID_2, "Alderlake-M" },
  60         { PCI_DID_INTEL_ADL_N_ID_1, "Alderlake-N" },
  61         { PCI_DID_INTEL_ADL_N_ID_2, "Alderlake-N" },
  62         { PCI_DID_INTEL_ADL_N_ID_3, "Alderlake-N" },
  63         { PCI_DID_INTEL_ADL_N_ID_4, "Alderlake-N" },
  64         { PCI_DID_INTEL_ADL_N_ID_5, "Alderlake-N" },
  65         { PCI_DID_INTEL_ADL_S_ID_1, "Alderlake-S (8+8)" },
  66         { PCI_DID_INTEL_ADL_S_ID_2, "Alderlake-S" },
  67         { PCI_DID_INTEL_ADL_S_ID_3, "Alderlake-S (8+4)" },
  68         { PCI_DID_INTEL_ADL_S_ID_4, "Alderlake-S" },
  69         { PCI_DID_INTEL_ADL_S_ID_5, "Alderlake-S (8+0)" },
  70         { PCI_DID_INTEL_ADL_S_ID_6, "Alderlake-S" },
  71         { PCI_DID_INTEL_ADL_S_ID_7, "Alderlake-S" },
  72         { PCI_DID_INTEL_ADL_S_ID_8, "Alderlake-S (6+4)" },
  73         { PCI_DID_INTEL_ADL_S_ID_9, "Alderlake-S" },
  74         { PCI_DID_INTEL_ADL_S_ID_10, "Alderlake-S (6+0)" },
  75         { PCI_DID_INTEL_ADL_S_ID_11, "Alderlake-S (4+0)" },
  76         { PCI_DID_INTEL_ADL_S_ID_12, "Alderlake-S (2+0)" },
  77         { PCI_DID_INTEL_ADL_S_ID_13, "Alderlake-S" },
  78         { PCI_DID_INTEL_ADL_S_ID_14, "Alderlake-S" },
  79         { PCI_DID_INTEL_RPL_HX_ID_1, "Raptorlake-HX (8+16)" },
  80         { PCI_DID_INTEL_RPL_HX_ID_2, "Raptorlake-HX (8+12)" },
  81         { PCI_DID_INTEL_RPL_HX_ID_3, "Raptorlake-HX (8+8)" },
  82         { PCI_DID_INTEL_RPL_HX_ID_4, "Raptorlake-HX (6+8)" },
  83         { PCI_DID_INTEL_RPL_HX_ID_5, "Raptorlake-HX (6+4)" },
  84         { PCI_DID_INTEL_RPL_HX_ID_6, "Raptorlake-HX (8+8)" },
  85         { PCI_DID_INTEL_RPL_HX_ID_7, "Raptorlake-HX (6+8)" },
  86         { PCI_DID_INTEL_RPL_HX_ID_8, "Raptorlake-HX (6+4)" },
  87         { PCI_DID_INTEL_RPL_P_ID_1, "Raptorlake-P/H/H Refresh (6+8)" },
  88         { PCI_DID_INTEL_RPL_P_ID_2, "Raptorlake-P/H/H Refresh (4+8)" },
  89         { PCI_DID_INTEL_RPL_P_ID_3, "Raptorlake-U/U Refresh (2+8)" },
  90         { PCI_DID_INTEL_RPL_P_ID_4, "Raptorlake-U/U Refresh (2+4)" },
  91         { PCI_DID_INTEL_RPL_P_ID_5, "Raptorlake-U (1+4)" },
  92         { PCI_DID_INTEL_RPL_P_ID_6, "Raptorlake-PX (6+8)" },
  93         { PCI_DID_INTEL_RPL_P_ID_7, "Raptorlake-PX (4+8)" },
  94         { PCI_DID_INTEL_RPL_P_ID_8, "Raptorlake-H (4+4)" },
  95         { PCI_DID_INTEL_RPL_S_ID_1, "Raptorlake-S (8+16)" },
  96         { PCI_DID_INTEL_RPL_S_ID_2, "Raptorlake-S (8+0)" },
  97         { PCI_DID_INTEL_RPL_S_ID_3, "Raptorlake-S (8+8)" },
  98         { PCI_DID_INTEL_RPL_S_ID_4, "Raptorlake-S (6+8)" },
  99         { PCI_DID_INTEL_RPL_S_ID_5, "Raptorlake-S (6+4)" },
 100 };
 101
 102 static struct {
 103         u16 espiid;
 104         const char *name;
 105 } pch_table[] = {
 106         { PCI_DID_INTEL_ADP_M_N_ESPI_1, "Alderlake-N SKU" },
 107         { PCI_DID_INTEL_ADP_M_N_ESPI_2, "Alderlake-N SKU" },
 108         { PCI_DID_INTEL_ADP_S_ESPI_H610E, "AlderLake-S H610E" },
 109         { PCI_DID_INTEL_ADP_S_ESPI_Q670E, "AlderLake-S Q670E" },
 110         { PCI_DID_INTEL_ADP_S_ESPI_R680E, "AlderLake-S R680E" },
 111         { PCI_DID_INTEL_ADP_S_ESPI_H610, "AlderLake-S H610" },
 112         { PCI_DID_INTEL_ADP_S_ESPI_B660, "AlderLake-S B660" },
 113         { PCI_DID_INTEL_ADP_S_ESPI_H670, "AlderLake-S H670" },
 114         { PCI_DID_INTEL_ADP_S_ESPI_Q670, "AlderLake-S Q670" },
 115         { PCI_DID_INTEL_ADP_S_ESPI_Z690, "AlderLake-S Z690" },
 116         { PCI_DID_INTEL_ADP_S_ESPI_W680, "AlderLake-S W680" },
 117         { PCI_DID_INTEL_ADP_S_ESPI_W790, "AlderLake-S W790" },
 118         { PCI_DID_INTEL_ADP_S_ESPI_WM690, "AlderLake-S WM690" },
 119         { PCI_DID_INTEL_ADP_S_ESPI_HM670, "AlderLake-S HM670" },
 120         { PCI_DID_INTEL_RPP_S_ESPI_0, "Raptorlake-S SKU" },
 121         { PCI_DID_INTEL_RPP_S_ESPI_1, "Raptorlake-S SKU" },
 122         { PCI_DID_INTEL_RPP_S_ESPI_2, "Raptorlake-S SKU" },
 123         { PCI_DID_INTEL_RPP_S_ESPI_3, "Raptorlake-S SKU" },
 124         { PCI_DID_INTEL_RPP_S_ESPI_Z790, "Raptorlake-S Z790" },
 125         { PCI_DID_INTEL_RPP_S_ESPI_H770, "Raptorlake-S H770" },
 126         { PCI_DID_INTEL_RPP_S_ESPI_B760, "Raptorlake-S B760" },
 127         { PCI_DID_INTEL_RPP_S_ESPI_7, "Raptorlake-S SKU" },
 128         { PCI_DID_INTEL_RPP_S_ESPI_8, "Raptorlake-S SKU" },
 129         { PCI_DID_INTEL_RPP_S_ESPI_9, "Raptorlake-S SKU" },
 130         { PCI_DID_INTEL_RPP_S_ESPI_10, "Raptorlake-S SKU" },
 131         { PCI_DID_INTEL_RPP_S_ESPI_11, "Raptorlake-S SKU" },
 132         { PCI_DID_INTEL_RPP_S_ESPI_HM770, "Raptorlake-S HM770" },
 133         { PCI_DID_INTEL_RPP_S_ESPI_WM790, "Raptorlake-S WM790" },
 134         { PCI_DID_INTEL_RPP_S_ESPI_14, "Raptorlake-S SKU" },
 135         { PCI_DID_INTEL_RPP_S_ESPI_15, "Raptorlake-S SKU" },
 136         { PCI_DID_INTEL_RPP_S_ESPI_16, "Raptorlake-S SKU" },
 137         { PCI_DID_INTEL_RPP_S_ESPI_17, "Raptorlake-S SKU" },
 138         { PCI_DID_INTEL_RPP_S_ESPI_18, "Raptorlake-S SKU" },
 139         { PCI_DID_INTEL_RPP_S_ESPI_19, "Raptorlake-S SKU" },
 140         { PCI_DID_INTEL_RPP_S_ESPI_20, "Raptorlake-S SKU" },
 141         { PCI_DID_INTEL_RPP_S_ESPI_21, "Raptorlake-S SKU" },
 142         { PCI_DID_INTEL_RPP_S_ESPI_22, "Raptorlake-S SKU" },
 143         { PCI_DID_INTEL_RPP_S_ESPI_23, "Raptorlake-S SKU" },
 144         { PCI_DID_INTEL_RPP_S_ESPI_24, "Raptorlake-S SKU" },
 145         { PCI_DID_INTEL_RPP_S_ESPI_25, "Raptorlake-S SKU" },
 146         { PCI_DID_INTEL_RPP_S_ESPI_26, "Raptorlake-S SKU" },
 147         { PCI_DID_INTEL_RPP_S_ESPI_27, "Raptorlake-S SKU" },
 148         { PCI_DID_INTEL_RPP_S_ESPI_28, "Raptorlake-S SKU" },
 149         { PCI_DID_INTEL_RPP_S_ESPI_29, "Raptorlake-S SKU" },
 150         { PCI_DID_INTEL_RPP_S_ESPI_30, "Raptorlake-S SKU" },
 151         { PCI_DID_INTEL_RPP_S_ESPI_31, "Raptorlake-S SKU" },
 152         { PCI_DID_INTEL_RPP_P_ESPI_0, "Raptorlake-P SKU" },
 153         { PCI_DID_INTEL_RPP_P_ADP_P_ESPI_1, "Alderlake-P SKU" },
 154         { PCI_DID_INTEL_RPP_P_ADP_P_ESPI_2, "Alderlake-P SKU" },
 155         { PCI_DID_INTEL_RPP_P_ESPI_3, "Raptorlake-P SKU" },
 156         { PCI_DID_INTEL_RPP_P_ESPI_4, "Raptorlake-P SKU" },
 157         { PCI_DID_INTEL_RPP_P_ESPI_5, "Raptorlake-P SKU" },
 158         { PCI_DID_INTEL_RPP_P_ADP_M_ESPI_6, "Alderlake-P SKU" },
 159         { PCI_DID_INTEL_RPP_P_ESPI_7, "Raptorlake-P SKU" },
 160         { PCI_DID_INTEL_RPP_P_ESPI_8, "Raptorlake-P SKU" },
 161         { PCI_DID_INTEL_RPP_P_ESPI_9, "Raptorlake-P SKU" },
 162         { PCI_DID_INTEL_RPP_P_ESPI_10, "Raptorlake-P SKU" },
 163         { PCI_DID_INTEL_RPP_P_ESPI_11, "Raptorlake-P SKU" },
 164         { PCI_DID_INTEL_RPP_P_ESPI_12, "Raptorlake-P SKU" },
 165         { PCI_DID_INTEL_RPP_P_ESPI_13, "Raptorlake-P SKU" },
 166         { PCI_DID_INTEL_RPP_P_ESPI_14, "Raptorlake-P SKU" },
 167         { PCI_DID_INTEL_RPP_P_ESPI_15, "Raptorlake-P SKU" },
 168         { PCI_DID_INTEL_RPP_P_ESPI_16, "Raptorlake-P SKU" },
 169         { PCI_DID_INTEL_RPP_P_ESPI_17, "Raptorlake-P SKU" },
 170         { PCI_DID_INTEL_RPP_P_ESPI_18, "Raptorlake-P SKU" },
 171         { PCI_DID_INTEL_RPP_P_ESPI_19, "Raptorlake-P SKU" },
 172         { PCI_DID_INTEL_RPP_P_ESPI_20, "Raptorlake-P SKU" },
 173         { PCI_DID_INTEL_RPP_P_ESPI_21, "Raptorlake-P SKU" },
 174         { PCI_DID_INTEL_RPP_P_ESPI_22, "Raptorlake-P SKU" },
 175         { PCI_DID_INTEL_RPP_P_ESPI_23, "Raptorlake-P SKU" },
 176         { PCI_DID_INTEL_RPP_P_ESPI_24, "Raptorlake-P SKU" },
 177         { PCI_DID_INTEL_RPP_P_ESPI_25, "Raptorlake-P SKU" },
 178         { PCI_DID_INTEL_RPP_P_ESPI_26, "Raptorlake-P SKU" },
 179         { PCI_DID_INTEL_RPP_P_ESPI_27, "Raptorlake-P SKU" },
 180         { PCI_DID_INTEL_RPP_P_ESPI_28, "Raptorlake-P SKU" },
 181         { PCI_DID_INTEL_RPP_P_ESPI_29, "Raptorlake-P SKU" },
 182         { PCI_DID_INTEL_RPP_P_ESPI_30, "Raptorlake-P SKU" },
 183         { PCI_DID_INTEL_RPP_P_ESPI_31, "Raptorlake-P SKU" },
 184 };
 185
 186 static struct {
 187         u16 igdid;
 188         const char *name;
 189 } igd_table[] = {
 190         { PCI_DID_INTEL_ADL_GT0, "Alderlake GT0" },
 191         { PCI_DID_INTEL_ADL_GT1, "Alderlake GT1" },
 192         { PCI_DID_INTEL_ADL_GT1_1, "Alderlake GT1" },
 193         { PCI_DID_INTEL_ADL_GT1_2, "Alderlake GT1" },
 194         { PCI_DID_INTEL_ADL_GT1_3, "Alderlake GT1" },
 195         { PCI_DID_INTEL_ADL_GT1_4, "Alderlake GT1" },
 196         { PCI_DID_INTEL_ADL_GT1_5, "Alderlake GT1" },
 197         { PCI_DID_INTEL_ADL_GT1_6, "Alderlake GT1" },
 198         { PCI_DID_INTEL_ADL_GT1_7, "Alderlake GT1" },
 199         { PCI_DID_INTEL_ADL_GT1_8, "Alderlake GT1" },
 200         { PCI_DID_INTEL_ADL_GT1_9, "Alderlake GT1" },
 201         { PCI_DID_INTEL_ADL_P_GT2, "Alderlake P GT2" },
 202         { PCI_DID_INTEL_ADL_P_GT2_1, "Alderlake P GT2" },
 203         { PCI_DID_INTEL_ADL_P_GT2_2, "Alderlake P GT2" },
 204         { PCI_DID_INTEL_ADL_P_GT2_3, "Alderlake P GT2" },
 205         { PCI_DID_INTEL_ADL_P_GT2_4, "Alderlake P GT2" },
 206         { PCI_DID_INTEL_ADL_P_GT2_5, "Alderlake P GT2" },
 207         { PCI_DID_INTEL_ADL_P_GT2_6, "Alderlake P GT2" },
 208         { PCI_DID_INTEL_ADL_P_GT2_7, "Alderlake P GT2" },
 209         { PCI_DID_INTEL_ADL_P_GT2_8, "Alderlake P GT2" },
 210         { PCI_DID_INTEL_ADL_P_GT2_9, "Alderlake P GT2" },
 211         { PCI_DID_INTEL_ADL_M_GT1, "Alderlake M GT1" },
 212         { PCI_DID_INTEL_ADL_M_GT2, "Alderlake M GT2" },
 213         { PCI_DID_INTEL_ADL_M_GT3, "Alderlake M GT3" },
 214         { PCI_DID_INTEL_ADL_N_GT1, "Alderlake N GT1" },
 215         { PCI_DID_INTEL_ADL_N_GT2, "Alderlake N GT2" },
 216         { PCI_DID_INTEL_ADL_N_GT3, "Alderlake N GT3" },
 217         { PCI_DID_INTEL_ADL_S_GT1,   "Alderlake S GT1" },
 218         { PCI_DID_INTEL_ADL_S_GT1_1, "Alderlake S GT1" },
 219         { PCI_DID_INTEL_ADL_S_GT2,   "Alderlake S GT2" },
 220         { PCI_DID_INTEL_ADL_S_GT2_1, "Alderlake S GT2" },
 221         { PCI_DID_INTEL_ADL_S_GT2_2, "Alderlake S GT2" },
 222         { PCI_DID_INTEL_RPL_HX_GT1, "Raptorlake HX GT1" },
 223         { PCI_DID_INTEL_RPL_HX_GT2, "Raptorlake HX GT2" },
 224         { PCI_DID_INTEL_RPL_HX_GT3, "Raptorlake HX GT3" },
 225         { PCI_DID_INTEL_RPL_HX_GT4, "Raptorlake HX GT4" },
 226         { PCI_DID_INTEL_RPL_P_GT1, "Raptorlake P GT1" },
 227         { PCI_DID_INTEL_RPL_P_GT2, "Raptorlake P GT2" },
 228         { PCI_DID_INTEL_RPL_P_GT3, "Raptorlake P GT3" },
 229         { PCI_DID_INTEL_RPL_P_GT4, "Raptorlake P GT4" },
 230         { PCI_DID_INTEL_RPL_P_GT5, "Raptorlake P GT5" },
 231         { PCI_DID_INTEL_RPL_U_GT1, "Raptorlake U GT1" },
 232         { PCI_DID_INTEL_RPL_U_GT2, "Raptorlake U GT2" },
 233         { PCI_DID_INTEL_RPL_U_GT3, "Raptorlake U GT3" },
 234         { PCI_DID_INTEL_RPL_U_GT4, "Raptorlake U GT4" },
 235         { PCI_DID_INTEL_RPL_U_GT5, "Raptorlake U GT5" },
 236         { PCI_DID_INTEL_RPL_S_GT0, "Raptorlake S GT0" },
 237         { PCI_DID_INTEL_RPL_S_GT1_1, "Raptorlake S GT1" },
 238         { PCI_DID_INTEL_RPL_S_GT1_2, "Raptorlake S GT1" },
 239         { PCI_DID_INTEL_RPL_S_GT1_3, "Raptorlake S GT1" },
 240         { PCI_DID_INTEL_TWL_GT1_1, "Twinlake GT1" },
 241         { PCI_DID_INTEL_TWL_GT1_2, "Twinlake GT1" },
 242 };
 243
 244 static inline uint8_t get_dev_revision(pci_devfn_t dev)
 245 {
 246         return pci_read_config8(dev, PCI_REVISION_ID);
 247 }
 248
 249 static inline uint16_t get_dev_id(pci_devfn_t dev)
 250 {
 251         return pci_read_config16(dev, PCI_DEVICE_ID);
 252 }
 253
 254 static void report_cache_info(void)
 255 {
 256         int cache_level = CACHE_L3;
 257         struct cpu_cache_info info;
 258
 259         if (!fill_cpu_cache_info(cache_level, &info))
 260                 return;
 261
 262         printk(BIOS_INFO, "Cache: Level %d: ", cache_level);
 263         printk(BIOS_INFO, "Associativity = %zd Partitions = %zd Line Size = %zd Sets = %zd\n",
 264                 info.num_ways, info.physical_partitions, info.line_size, info.num_sets);
 265
 266         printk(BIOS_INFO, "Cache size = %zu MiB\n", get_cache_size(&info)/MiB);
 267 }
 268
 269 static void report_cpu_info(void)
 270 {
 271         u32 i, cpu_id, cpu_feature_flag;
 272         char cpu_name[49];
 273         int vt, txt, aes;
 274         static const char *const mode[] = {"NOT ", ""};
 275         const char *cpu_type = "Unknown";
 276
 277         fill_processor_name(cpu_name);
 278         cpu_id = cpu_get_cpuid();
 279
 280         /* Look for string to match the name */
 281         for (i = 0; i < ARRAY_SIZE(cpu_table); i++) {
 282                 if (cpu_table[i].cpuid == cpu_id) {
 283                         cpu_type = cpu_table[i].name;
 284                         break;
 285                 }
 286         }
 287
 288         printk(BIOS_DEBUG, "CPU: %s\n", cpu_name);
 289         printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n",
 290                cpu_id, cpu_type, get_current_microcode_rev());
 291
 292         cpu_feature_flag = cpu_get_feature_flags_ecx();
 293         aes = !!(cpu_feature_flag & CPUID_AES);
 294         txt = !!(cpu_feature_flag & CPUID_SMX);
 295         vt = !!(cpu_feature_flag & CPUID_VMX);
 296         printk(BIOS_DEBUG,
 297                 "CPU: AES %ssupported, TXT %ssupported, VT %ssupported\n",
 298                 mode[aes], mode[txt], mode[vt]);
 299
 300         report_cache_info();
 301 }
 302
 303 static void report_mch_info(void)
 304 {
 305         int i;
 306         uint16_t mchid = get_dev_id(SA_DEV_ROOT);
 307         const char *mch_type = "Unknown";
 308
 309         for (i = 0; i < ARRAY_SIZE(mch_table); i++) {
 310                 if (mch_table[i].mchid == mchid) {
 311                         mch_type = mch_table[i].name;
 312                         break;
 313                 }
 314         }
 315
 316         printk(BIOS_DEBUG, "MCH: device id %04x (rev %02x) is %s\n",
 317                 mchid, get_dev_revision(SA_DEV_ROOT), mch_type);
 318 }
 319
 320 static void report_pch_info(void)
 321 {
 322         int i;
 323         pci_devfn_t dev = PCH_DEV_ESPI;
 324         uint16_t espiid = get_dev_id(dev);
 325         const char *pch_type = "Unknown";
 326
 327         for (i = 0; i < ARRAY_SIZE(pch_table); i++) {
 328                 if (pch_table[i].espiid == espiid) {
 329                         pch_type = pch_table[i].name;
 330                         break;
 331                 }
 332         }
 333         printk(BIOS_DEBUG, "PCH: device id %04x (rev %02x) is %s\n",
 334                 espiid, get_dev_revision(dev), pch_type);
 335 }
 336
 337 static void report_igd_info(void)
 338 {
 339         int i;
 340         pci_devfn_t dev = SA_DEV_IGD;
 341         uint16_t igdid = get_dev_id(dev);
 342         const char *igd_type = "Unknown";
 343
 344         for (i = 0; i < ARRAY_SIZE(igd_table); i++) {
 345                 if (igd_table[i].igdid == igdid) {
 346                         igd_type = igd_table[i].name;
 347                         break;
 348                 }
 349         }
 350         printk(BIOS_DEBUG, "IGD: device id %04x (rev %02x) is %s\n",
 351                 igdid, get_dev_revision(dev), igd_type);
 352 }
 353
 354 void report_platform_info(void)
 355 {
 356         report_cpu_info();
 357         report_mch_info();
 358         report_pch_info();
 359         report_igd_info();
 360 }