src/vendorcode/amd/agesa/f14/Proc/Mem/NB/DA/mnParTrainDa.c

   1 /* $NoKeywords:$ */
   2 /**
   3  * @file
   4  *
   5  * mnParTrainDa.c
   6  *
   7  * Feature which performs Memory DQS training on each node with each node training
   8  * its own memory through code running on a core in the associated processor.
   9  * This way memory can be trained in parallel by more than one processor.
  10  *
  11  * This file contains the Deerhound specific parallel training function.
  12  *
  13  * @xrefitem bom "File Content Label" "Release Content"
  14  * @e project: AGESA
  15  * @e sub-project: (Mem/Feat/HCTRN)
  16  * @e \$Revision: 35136 $ @e \$Date: 2010-07-16 11:29:48 +0800 (Fri, 16 Jul 2010) $
  17  *
  18  **/
  19 /*
  20  *****************************************************************************
  21  *
  22  * Copyright (c) 2011, Advanced Micro Devices, Inc.
  23  * All rights reserved.
  24  *
  25  * Redistribution and use in source and binary forms, with or without
  26  * modification, are permitted provided that the following conditions are met:
  27  *     * Redistributions of source code must retain the above copyright
  28  *       notice, this list of conditions and the following disclaimer.
  29  *     * Redistributions in binary form must reproduce the above copyright
  30  *       notice, this list of conditions and the following disclaimer in the
  31  *       documentation and/or other materials provided with the distribution.
  32  *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
  33  *       its contributors may be used to endorse or promote products derived
  34  *       from this software without specific prior written permission.
  35  *
  36  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  37  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  38  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  39  * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
  40  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  41  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  42  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  43  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  44  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  45  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  46  *
  47  * ***************************************************************************
  48  *
  49  */
  50
  51
  52
  53
  54 #include "AGESA.h"
  55 #include "AdvancedApi.h"
  56 #include "amdlib.h"
  57 #include "OptionMemory.h"
  58 #include "mm.h"
  59 #include "mn.h"
  60 #include "mnda.h"
  61 #include "Ids.h"
  62 #include "cpuRegisters.h"
  63 #include "cpuServices.h"
  64 #include "GeneralServices.h"
  65 #include "cpuFamilyTranslation.h"
  66 #include "cpuApicUtilities.h"
  67 #include "mfParallelTraining.h"
  68 #include "heapManager.h"
  69 #include "Filecode.h"
  70 CODE_GROUP (G1_PEICC)
  71 RDATA_GROUP (G1_PEICC)
  72
  73 #define FILECODE PROC_MEM_NB_DA_MNPARTRAINDA_FILECODE
  74
  75 /*-----------------------------------------------------------------------------
  76 *                                EXPORTED FUNCTIONS
  77 *
  78 *-----------------------------------------------------------------------------
  79 */
  80
  81 BOOLEAN
  82 STATIC
  83 MemConstructRemoteNBBlockDA (
  84   IN OUT   MEM_NB_BLOCK *NBPtr,
  85   IN       DIE_STRUCT *MCTPtr,
  86   IN       MEM_FEAT_BLOCK_NB *FeatPtr
  87 );
  88
  89 /* -----------------------------------------------------------------------------*/
  90 /**
  91  *
  92  *
  93  *       This is the training function which set up the environment for remote
  94  * training on the ap and launches the remote routine.
  95  *
  96  *     @param[in,out]   *NBPtr   - Pointer to the MEM_NB_BLOCK
  97  *
  98  *     @return          TRUE -  Launch training on AP successfully.
  99  *     @return          FALSE - Fail to launch training on AP.
 100  */
 101 BOOLEAN
 102 MemFParallelTrainingDA (
 103   IN OUT   MEM_NB_BLOCK *NBPtr
 104   )
 105 {
 106   AMD_CONFIG_PARAMS *StdHeader;
 107   DIE_STRUCT *MCTPtr;
 108   REMOTE_TRAINING_ENV *EnvPtr;
 109   AP_TASK TrainingTask;
 110   UINT8 Socket;
 111   UINT8 Module;
 112   UINT8 APCore;
 113   UINT8 p;
 114   UINT32 LowCore;
 115   UINT32 HighCore;
 116   UINT32 BspSocket;
 117   UINT32 BspModule;
 118   UINT32 BspCore;
 119   AGESA_STATUS Status;
 120   ALLOCATE_HEAP_PARAMS AllocHeapParams;
 121   UINT16 MctDataSize;
 122   StdHeader = &(NBPtr->MemPtr->StdHeader);
 123   MCTPtr = NBPtr->MCTPtr;
 124   Socket = MCTPtr->SocketId;
 125   Module = MCTPtr->DieId;
 126
 127   //
 128   // Allocate buffer for REMOTE_TRAINING_ENV
 129   //
 130   MctDataSize = MAX_DCTS_PER_NODE_DA * (
 131                   sizeof (DCT_STRUCT) + (
 132                     MAX_CHANNELS_PER_DCT_DA * (sizeof (CH_DEF_STRUCT) + sizeof (MEM_PS_BLOCK))
 133                   )
 134                 );
 135   AllocHeapParams.RequestedBufferSize = MctDataSize + sizeof (REMOTE_TRAINING_ENV);
 136   AllocHeapParams.BufferHandle = GENERATE_MEM_HANDLE (ALLOC_PAR_TRN_HANDLE, Socket, Module, 0);
 137   AllocHeapParams.Persist = HEAP_LOCAL_CACHE;
 138   if (HeapAllocateBuffer (&AllocHeapParams, StdHeader) == AGESA_SUCCESS) {
 139     EnvPtr = (REMOTE_TRAINING_ENV *) AllocHeapParams.BufferPtr;
 140     AllocHeapParams.BufferPtr += sizeof (REMOTE_TRAINING_ENV);
 141
 142     //
 143     // Setup Remote training environment
 144     //
 145     LibAmdMemCopy (&(EnvPtr->StdHeader), StdHeader, sizeof (AMD_CONFIG_PARAMS), StdHeader);
 146     LibAmdMemCopy (&(EnvPtr->DieStruct), MCTPtr, sizeof (DIE_STRUCT), StdHeader);
 147     for (p = 0; p < MAX_PLATFORM_TYPES; p++) {
 148       EnvPtr->GetPlatformCfg[p] = NBPtr->MemPtr->GetPlatformCfg[p];
 149     }
 150     EnvPtr->ErrorHandling = NBPtr->MemPtr->ErrorHandling;
 151     EnvPtr->NBBlockCtor = MemConstructRemoteNBBlockDA;
 152     EnvPtr->FeatPtr = NBPtr->FeatPtr;
 153     EnvPtr->HoleBase = NBPtr->RefPtr->HoleBase;
 154     EnvPtr->BottomIo = NBPtr->RefPtr->BottomIo;
 155     EnvPtr->SysLimit = NBPtr->RefPtr->SysLimit;
 156     EnvPtr->TableBasedAlterations = NBPtr->RefPtr->TableBasedAlterations;
 157     EnvPtr->PlatformMemoryConfiguration = NBPtr->RefPtr->PlatformMemoryConfiguration;
 158
 159     LibAmdMemCopy (AllocHeapParams.BufferPtr, MCTPtr->DctData, MctDataSize, StdHeader);
 160
 161     //
 162     // Get Socket, Core of the BSP
 163     //
 164     IdentifyCore (StdHeader, &BspSocket, &BspModule, &BspCore, &Status);
 165     EnvPtr->BspSocket = ((UINT8)BspSocket & 0x000000FF);
 166     EnvPtr->BspCore = ((UINT8)BspCore & 0x000000FF);
 167
 168     //
 169     // Set up the remote task structure
 170     //
 171     TrainingTask.DataTransfer.DataPtr = EnvPtr;
 172     TrainingTask.DataTransfer.DataSizeInDwords = (UINT16) ((AllocHeapParams.RequestedBufferSize + 3) / 4);
 173     TrainingTask.DataTransfer.DataTransferFlags = 0;
 174     TrainingTask.ExeFlags = 0;
 175     TrainingTask.FuncAddress.PfApTaskI = (PF_AP_TASK_I)MemFParallelTraining;
 176
 177     //
 178     // Get Target AP Core
 179     //
 180     GetGivenModuleCoreRange (Socket, Module, &LowCore, &HighCore, StdHeader);
 181     APCore = (UINT8) (LowCore & 0x000000FF);
 182
 183     //
 184     // Launch Remote Training
 185     //
 186     ApUtilRunCodeOnSocketCore (Socket, APCore, &TrainingTask, StdHeader);
 187
 188     HeapDeallocateBuffer (AllocHeapParams.BufferHandle, StdHeader);
 189     return TRUE;
 190   } else {
 191     PutEventLog (AGESA_FATAL, MEM_ERROR_HEAP_ALLOCATE_FOR_REMOTE_TRAINING_ENV, NBPtr->Node, 0, 0, 0, StdHeader);
 192     SetMemError (AGESA_FATAL, MCTPtr);
 193     ASSERT(FALSE); // Could not allocated heap space for "REMOTE_TRAINING_ENV"
 194     return FALSE;
 195   }
 196 }
 197
 198 BOOLEAN
 199 STATIC
 200 MemConstructRemoteNBBlockDA (
 201   IN OUT   MEM_NB_BLOCK *NBPtr,
 202   IN       DIE_STRUCT *MCTPtr,
 203   IN       MEM_FEAT_BLOCK_NB *FeatPtr
 204   )
 205 {
 206   CPU_SPECIFIC_SERVICES *FamilySpecificServices;
 207
 208   NBPtr->MCTPtr = MCTPtr;
 209   NBPtr->PciAddr.AddressValue = MCTPtr->PciAddr.AddressValue;
 210
 211   MemNInitNBDataDA (NBPtr);
 212
 213   FeatPtr->InitCPG (NBPtr);
 214   NBPtr->FeatPtr = FeatPtr;
 215   FeatPtr->InitHwRxEn (NBPtr);
 216
 217   MemNSwitchDCTNb (NBPtr, 0);
 218
 219   //----------------------------------------------------------------------------
 220   // Get TSC rate of the this AP
 221   //----------------------------------------------------------------------------
 222   GetCpuServicesOfCurrentCore ((const CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, &NBPtr->MemPtr->StdHeader);
 223   FamilySpecificServices->GetTscRate (FamilySpecificServices, &NBPtr->MemPtr->TscRate, &NBPtr->MemPtr->StdHeader);
 224
 225   return TRUE;
 226 }