src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.h

   1 /* $NoKeywords:$ */
   2 /**
   3  * @file
   4  *
   5  * Various PCI service routines.
   6  *
   7  *
   8  *
   9  * @xrefitem bom "File Content Label" "Release Content"
  10  * @e project:     AGESA
  11  * @e sub-project: GNB
  12  * @e \$Revision: 36567 $   @e \$Date: 2010-08-20 11:35:15 -0700 (Fri, 20 Aug 2010) $
  13  *
  14  */
  15 /*
  16  *****************************************************************************
  17  *
  18  * Copyright (c) 2011, Advanced Micro Devices, Inc.
  19  * All rights reserved.
  20  *
  21  * Redistribution and use in source and binary forms, with or without
  22  * modification, are permitted provided that the following conditions are met:
  23  *     * Redistributions of source code must retain the above copyright
  24  *       notice, this list of conditions and the following disclaimer.
  25  *     * Redistributions in binary form must reproduce the above copyright
  26  *       notice, this list of conditions and the following disclaimer in the
  27  *       documentation and/or other materials provided with the distribution.
  28  *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
  29  *       its contributors may be used to endorse or promote products derived
  30  *       from this software without specific prior written permission.
  31  *
  32  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  34  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  35  * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
  36  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  37  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  38  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  39  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  40  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  41  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  42  *
  43  * ***************************************************************************
  44  *
  45  */
  46
  47 #ifndef _PCILIB_H_
  48 #define _PCILIB_H_
  49
  50 /// PCIe device type
  51 typedef enum {
  52   PcieDeviceEndPoint,                       ///< Endpoint
  53   PcieDeviceLegacyEndPoint,                 ///< Legacy endpoint
  54   PcieDeviceRootComplex = 4,                ///< Root complex
  55   PcieDeviceUpstreamPort,                   ///< Upstream port
  56   PcieDeviceDownstreamPort,                 ///< Downstream Port
  57   PcieDevicePcieToPcix,                     ///< PCIe to PCI/PCIx bridge
  58   PcieDevicePcixToPcie,                     ///< PCI/PCIx to PCIe bridge
  59   PcieNotPcieDevice = 0xff                  ///< unknown device
  60 } PCIE_DEVICE_TYPE;
  61
  62 typedef  UINT32 SCAN_STATUS;
  63
  64 #define SCAN_SKIP_FUNCTIONS         0x1
  65 #define SCAN_SKIP_DEVICES           0x2
  66 #define SCAN_SKIP_BUSES             0x4
  67 #define SCAN_SUCCESS                 0x0
  68
  69 //  Forward declaration needed for multi-structure mutual references
  70 AGESA_FORWARD_DECLARATION (GNB_PCI_SCAN_DATA);
  71
  72 typedef SCAN_STATUS (*GNB_SCAN_CALLBACK) (
  73   IN       PCI_ADDR             Device,
  74   IN OUT   GNB_PCI_SCAN_DATA    *ScanData
  75   );
  76
  77 ///Scan supporting data
  78 typedef struct _GNB_PCI_SCAN_DATA {
  79   GNB_SCAN_CALLBACK     GnbScanCallback;  ///< Callback for each found device
  80   AMD_CONFIG_PARAMS     *StdHeader;       ///< Standard configuration header
  81 } Unused_GNB_PCI_SCAN_DATA;
  82
  83 #define   PCIE_CAP_ID               0x10
  84 #define   PCIE_LINK_CAP_REGISTER    0x0C
  85 #define   PCIE_LINK_CTRL_REGISTER   0x10
  86 #define   PCIE_DEVICE_CAP_REGISTER  0x04
  87 #define   PCIE_ASPM_L1_SUPPORT_CAP  BIT11
  88
  89 BOOLEAN
  90 GnbLibPciIsDevicePresent (
  91   IN      UINT32              Address,
  92   IN      AMD_CONFIG_PARAMS   *StdHeader
  93  );
  94
  95 BOOLEAN
  96 GnbLibPciIsBridgeDevice (
  97   IN      UINT32              Address,
  98   IN      AMD_CONFIG_PARAMS   *StdHeader
  99  );
 100
 101 BOOLEAN
 102 GnbLibPciIsMultiFunctionDevice (
 103   IN      UINT32              Address,
 104   IN      AMD_CONFIG_PARAMS   *StdHeader
 105  );
 106
 107 BOOLEAN
 108 GnbLibPciIsPcieDevice (
 109   IN      UINT32              Address,
 110   IN      AMD_CONFIG_PARAMS   *StdHeader
 111  );
 112
 113 UINT8
 114 GnbLibFindPciCapability (
 115   IN      UINT32              Address,
 116   IN      UINT8               CapabilityId,
 117   IN      AMD_CONFIG_PARAMS   *StdHeader
 118   );
 119
 120 UINT16
 121 GnbLibFindPcieExtendedCapability (
 122   IN      UINT32              Address,
 123   IN      UINT16              ExtendedCapabilityId,
 124   IN      AMD_CONFIG_PARAMS   *StdHeader
 125   );
 126
 127 VOID
 128 GnbLibPciScan (
 129   IN      PCI_ADDR            Start,
 130   IN      PCI_ADDR            End,
 131   IN      GNB_PCI_SCAN_DATA   *ScanData
 132  );
 133
 134 VOID
 135 GnbLibPciScanSecondaryBus (
 136   IN       PCI_ADDR             Bridge,
 137   IN OUT   GNB_PCI_SCAN_DATA    *ScanData
 138   );
 139
 140 PCIE_DEVICE_TYPE
 141 GnbLibGetPcieDeviceType (
 142   IN      PCI_ADDR            Device,
 143   IN      AMD_CONFIG_PARAMS   *StdHeader
 144   );
 145
 146 VOID
 147 GnbLibS3SaveConfigSpace (
 148   IN      UINT32              Address,
 149   IN      UINT16              StartRegisterAddress,
 150   IN      UINT16              EndRegisterAddress,
 151   IN      ACCESS_WIDTH        Width,
 152   IN      AMD_CONFIG_PARAMS   *StdHeader
 153   );
 154
 155 #endif