soc/intel/apollolake: clarify Fast SPI CS2 pad configuration
[coreboot.git] / src / mainboard / intel / amenia / Kconfig
blobb2c1a8ce196d2dd6ec58d046c1ad8486336d162b
1 if BOARD_INTEL_AMENIA
3 config BOARD_SPECIFIC_OPTIONS
4         def_bool y
5         select SOC_INTEL_APOLLOLAKE
6         select BOARD_ROMSIZE_KB_8192
7         select MAINBOARD_HAS_CHROMEOS
8         select EC_GOOGLE_CHROMEEC
9         select EC_GOOGLE_CHROMEEC_LPC
10         select EC_GOOGLE_CHROMEEC_PD
11         select HAVE_ACPI_TABLES
12         select MAINBOARD_HAS_LPC_TPM
13         select HAVE_ACPI_RESUME
14         select MAINBOARD_HAS_CHROMEOS
15         select TPM_ON_FAST_SPI
17 config CHROMEOS
18         bool
19         default y
21 config MAINBOARD_DIR
22         string
23         default intel/amenia
25 config MAINBOARD_PART_NUMBER
26         string
27         default "Amenia"
29 config MAINBOARD_VENDOR
30         string
31         default "Intel"
33 config FMAP_FILE
34         string
35         default "amenia"
37 config PREBUILT_SPI_IMAGE
38         string
39         default "amenia.bin.orig.a0"
41 config IFD_BIOS_END
42         hex
43         default 0x6FF000
45 config IFD_BIOS_START
46         hex
47         default 0x1000
49 config FLASHMAP_OFFSET
50         hex
51         default 0x200000
53 config MAX_CPUS
54         int
55         default 8
57 endif # BOARD_INTEL_AMENIA