cpu/intel/model_206ax: Remove the notion of sockets
[coreboot.git] / src / mainboard / hp / 8470p / devicetree.cb
blob2a115cc62a011b757d1103f00e47b9f4a1f0af1b
2 # This file is part of the coreboot project.
4 # Copyright (C) 2017 Iru Cai <mytbk920423@gmail.com>
6 # This program is free software; you can redistribute it and/or modify
7 # it under the terms of the GNU General Public License as published by
8 # the Free Software Foundation; either version 2 of the License, or
9 # (at your option) any later version.
11 # This program is distributed in the hope that it will be useful,
12 # but WITHOUT ANY WARRANTY; without even the implied warranty of
13 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 # GNU General Public License for more details.
17 chip northbridge/intel/sandybridge
18 register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"
19 register "gfx.link_frequency_270_mhz" = "1"
20 register "gfx.ndid" = "3"
21 register "gfx.use_spread_spectrum_clock" = "1"
22 register "gpu_cpu_backlight" = "0x00000385"
23 register "gpu_dp_b_hotplug" = "4"
24 register "gpu_dp_c_hotplug" = "4"
25 register "gpu_dp_d_hotplug" = "4"
26 register "gpu_panel_port_select" = "0"
27 register "gpu_panel_power_backlight_off_delay" = "2000"
28 register "gpu_panel_power_backlight_on_delay" = "2000"
29 register "gpu_panel_power_cycle_delay" = "5"
30 register "gpu_panel_power_down_delay" = "230"
31 register "gpu_panel_power_up_delay" = "300"
32 register "gpu_pch_backlight" = "0x0d9c0d9c"
33 device cpu_cluster 0x0 on
34 chip cpu/intel/model_206ax
35 register "c1_acpower" = "1"
36 register "c1_battery" = "1"
37 register "c2_acpower" = "3"
38 register "c2_battery" = "3"
39 register "c3_acpower" = "5"
40 register "c3_battery" = "5"
41 device lapic 0x0 on end
42 device lapic 0xacac off end
43 end
44 end
45 device domain 0x0 on
46 device pci 00.0 on # Host bridge
47 subsystemid 0x103c 0x179b
48 end
49 device pci 01.0 on # PCIe Bridge for discrete graphics
50 end
51 device pci 02.0 on # Internal graphics VGA controller
52 subsystemid 0x103c 0x179b
53 end
55 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
56 register "c2_latency" = "0x0065"
57 register "docking_supported" = "0"
58 register "gen1_dec" = "0x007c0201"
59 register "gen2_dec" = "0x000c0101"
60 register "gen3_dec" = "0x00fcfe01"
61 register "gen4_dec" = "0x000402e9"
62 register "gpi6_routing" = "2"
63 register "p_cnt_throttling_supported" = "1"
64 register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
65 register "pcie_port_coalesce" = "1"
66 register "sata_interface_speed_support" = "0x3"
67 # HDD(0), ODD(1), mSATA(2), eSATA(4)
68 register "sata_port_map" = "0x3f"
69 register "superspeed_capable_ports" = "0x0000000f"
70 register "xhci_overcurrent_mapping" = "0x00000c03"
71 register "xhci_switchable_ports" = "0x0000000f"
73 register "spi_uvscc" = "0x2005"
74 register "spi_lvscc" = "0"
76 device pci 14.0 on # USB 3.0 Controller
77 subsystemid 0x103c 0x179b
78 end
79 device pci 16.0 on # Management Engine Interface 1
80 subsystemid 0x103c 0x179b
81 end
82 device pci 16.1 off # Management Engine Interface 2
83 end
84 device pci 16.2 off # Management Engine IDE-R
85 end
86 device pci 16.3 on # Management Engine KT
87 subsystemid 0x103c 0x179b
88 end
89 device pci 19.0 on # Intel Gigabit Ethernet
90 subsystemid 0x103c 0x179b
91 end
92 device pci 1a.0 on # USB2 EHCI #2
93 subsystemid 0x103c 0x179b
94 end
95 device pci 1b.0 on # High Definition Audio Audio controller
96 subsystemid 0x103c 0x179b
97 end
98 device pci 1c.0 on # PCIe Port #1
99 subsystemid 0x103c 0x179b
101 device pci 1c.1 on # PCIe Port #2, ExpressCard
102 subsystemid 0x103c 0x179b
104 device pci 1c.2 on # PCIe Port #3, SD/MMC
105 subsystemid 0x103c 0x179b
107 device pci 1c.3 on # PCIe Port #4, WLAN
108 subsystemid 0x103c 0x179b
110 device pci 1c.4 off # PCIe Port #5
112 device pci 1c.5 off # PCIe Port #6
114 device pci 1c.6 off # PCIe Port #7
116 device pci 1c.7 off # PCIe Port #8
118 device pci 1d.0 on # USB2 EHCI #1
119 subsystemid 0x103c 0x179b
121 device pci 1e.0 off # PCI bridge
123 device pci 1f.0 on # LPC bridge PCI-LPC bridge
124 subsystemid 0x103c 0x179b
125 chip ec/hp/kbc1126
126 register "ec_data_port" = "0x62"
127 register "ec_cmd_port" = "0x66"
128 register "ec_ctrl_reg" = "0x81"
129 register "ec_fan_ctrl_value" = "0x6b"
130 device pnp ff.1 off end
131 end # kbc1126
132 chip superio/smsc/lpc47n217
133 device pnp 4e.3 on # Parallel
134 io 0x60 = 0x378
135 irq 0x70 = 7
137 device pnp 4e.4 on # Com1
138 io 0x60 = 0x3f8
139 irq 0x70 = 4
141 device pnp 4e.5 off # Com2
143 end #chip superio/smsc/lpc47n217
145 device pci 1f.2 on # SATA Controller 1
146 subsystemid 0x103c 0x179b
148 device pci 1f.3 off # SMBus
150 device pci 1f.5 off # SATA Controller 2
152 device pci 1f.6 off # Thermal