src/cpu/intel/model_206ax/Kconfig

   1 config CPU_INTEL_MODEL_206AX
   2         bool
   3
   4 config CPU_INTEL_MODEL_306AX
   5         bool
   6
   7 if CPU_INTEL_MODEL_206AX || CPU_INTEL_MODEL_306AX
   8
   9 config CPU_SPECIFIC_OPTIONS
  10         def_bool y
  11         select ARCH_BOOTBLOCK_X86_32
  12         select ARCH_VERSTAGE_X86_32
  13         select ARCH_ROMSTAGE_X86_32
  14         select ARCH_RAMSTAGE_X86_32
  15         select SMP
  16         select MMX
  17         select SSE2
  18         select UDELAY_TSC
  19         select TSC_CONSTANT_RATE
  20         select TSC_MONOTONIC_TIMER
  21         select SMM_TSEG
  22         select SUPPORT_CPU_UCODE_IN_CBFS
  23         #select AP_IN_SIPI_WAIT
  24         select TSC_SYNC_MFENCE
  25         select CPU_INTEL_COMMON
  26         select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
  27         select PARALLEL_MP
  28
  29 config BOOTBLOCK_CPU_INIT
  30         string
  31         default "cpu/intel/model_206ax/bootblock.c"
  32
  33 config XIP_ROM_SIZE
  34         hex
  35         default 0x20000 if USE_NATIVE_RAMINIT
  36
  37 config SMM_TSEG_SIZE
  38         hex
  39         default 0x800000
  40
  41 config SMM_RESERVED_SIZE
  42         hex
  43         default 0x100000
  44
  45 # Intel Enhanced Debug region must be 4MB
  46 config IED_REGION_SIZE
  47         hex
  48         default 0x400000
  49
  50 endif