mainboard/*/romstage.c: Sanitize system header inclusions
[coreboot.git] / util / dumpmmcr / dumpmmcr.c
bloba92068aad17074aa85851e63e821bc9399cc3a39
1 /*
2 * dump mmcr of Elan520 uController (incomplete, see 22005b pg23+).
4 * Copyright 2005 Ronald G. Minnich
5 * Copyright 2006 coresystems GmbH
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <errno.h>
24 #include <fcntl.h>
25 #include <sys/mman.h>
26 #include <unistd.h>
27 #include <stdio.h>
28 #include <string.h>
29 #include <stdlib.h>
30 #include <stdint.h>
31 #include <getopt.h>
32 #include "../../src/include/cpu/amd/sc520.h"
34 #define val(x,y) (x->y)
36 int print_mmcr(struct mmcr *mmcr)
38 int i;
39 printf("revid is 0x%x\n\n", val(mmcr, revid));
40 printf("cpucontrol is 0x%x\n\n", val(mmcr, cpucontrol));
42 printf("\n");
43 printf("drcctl is 0x%x\n", val(mmcr, memregs.drcctl));
44 printf("drctmctl is 0x%x\n", val(mmcr, memregs.drctmctl));
45 printf("drccfg is 0x%x\n", val(mmcr, memregs.drccfg));
46 printf("bendaddr is 0x%02x%02x%02x%02x\n",
47 val(mmcr, memregs.drcbendadr[3]),
48 val(mmcr, memregs.drcbendadr[2]),
49 val(mmcr, memregs.drcbendadr[1]),
50 val(mmcr, memregs.drcbendadr[0]));
51 printf("eccctl is 0x%x\n", val(mmcr, memregs.eccctl));
52 printf("eccsta is 0x%x\n", val(mmcr, memregs.eccsta));
53 printf("ckbpos is 0x%x\n", val(mmcr, memregs.eccckbpos));
54 printf("cktest is 0x%x\n", val(mmcr, memregs.ecccktest));
55 printf("sbadd is 0x%lx\n", val(mmcr, memregs.eccsbadd));
56 printf("mbadd is 0x%lx\n", val(mmcr, memregs.eccmbadd));
58 printf("\n");
59 printf("dbctl is 0x%x\n", val(mmcr, dbctl.dbctl));
61 printf("\n");
62 printf("bootcs is 0x%x\n", val(mmcr, romregs.bootcs));
63 printf("romcs1 is 0x%x\n", val(mmcr, romregs.romcs1));
64 printf("romcs2 is 0x%x\n", val(mmcr, romregs.romcs2));
66 printf("\n");
67 printf("hbctl is 0x%x\n", val(mmcr, hostbridge.ctl));
68 printf("hbtgtirqctl is 0x%x\n", val(mmcr, hostbridge.tgtirqctl));
69 printf("hbtgtirqsta is 0x%x\n", val(mmcr, hostbridge.tgtirqsta));
70 printf("hbmstirqctl is 0x%x\n", val(mmcr, hostbridge.mstirqctl));
71 printf("hbmstirqsta is 0x%x\n", val(mmcr, hostbridge.mstirqsta));
72 printf("mstintadd is 0x%lx\n", val(mmcr, hostbridge.mstintadd));
75 printf("\n");
76 printf("sysarbctl is 0x%x\n", val(mmcr, sysarb.ctl));
77 printf("pciarbsta is 0x%x\n", val(mmcr, sysarb.sta));
78 printf("sysarbmenb is 0x%x\n", val(mmcr, sysarb.menb));
79 printf("arbprictl is 0x%lx\n", val(mmcr, sysarb.prictl));
81 printf("\n");
82 printf("adddecctl is 0x%x\n", val(mmcr, sysmap.adddecctl));
83 printf("wpvsta is 0x%x\n", val(mmcr, sysmap.wpvsta));
84 for (i=0; i<16; i++)
85 printf("par %d is 0x%lx\n", i, val(mmcr, sysmap.par[i]));
87 printf("\n");
88 printf("gpecho is 0x%x\n", val(mmcr, gpctl.gpecho));
89 printf("gpcsdw is 0x%x\n", val(mmcr, gpctl.gpcsdw));
90 printf("gpcsqual is 0x%x\n", val(mmcr, gpctl.gpcsqual));
91 printf("gpcsrt is 0x%x\n", val(mmcr, gpctl.gpcsrt));
92 printf("gpcspw is 0x%x\n", val(mmcr, gpctl.gpcspw));
93 printf("gpcsoff is 0x%x\n", val(mmcr, gpctl.gpcsoff));
94 printf("gprdw is 0x%x\n", val(mmcr, gpctl.gprdw));
95 printf("gprdoff is 0x%x\n", val(mmcr, gpctl.gprdoff));
96 printf("gpwrw is 0x%x\n", val(mmcr, gpctl.gpwrw));
97 printf("gpwroff is 0x%x\n", val(mmcr, gpctl.gpwroff));
98 printf("gpalew is 0x%x\n", val(mmcr, gpctl.gpalew));
99 printf("gpaleoff is 0x%x\n", val(mmcr, gpctl.gpaleoff));
101 printf("\n");
103 printf("piopfs15_0 is 0x%x\n", val(mmcr, pio.pfs15_0));
104 printf("piopfs31_16 is 0x%x\n", val(mmcr, pio.pfs31_16));
105 printf("cspfs is 0x%x\n", val(mmcr, pio.cspfs));
106 printf("clksel is 0x%x\n", val(mmcr, pio.clksel));
107 printf("dsctl is 0x%x\n", val(mmcr, pio.dsctl));
108 printf("piodir15_0 is 0x%x\n", val(mmcr, pio.dir15_0));
109 printf("piodir31_16 is 0x%x\n", val(mmcr, pio.dir31_16));
110 printf("piodata15_0 is 0x%x\n", val(mmcr, pio.data15_0));
111 printf("piodata31_16 is 0x%x\n", val(mmcr, pio.data31_16));
112 printf("pioset15_0 is 0x%x\n", val(mmcr, pio.set15_0));
113 printf("pioset31_16 is 0x%x\n", val(mmcr, pio.set31_16));
114 printf("pioclr15_0 is 0x%x\n", val(mmcr, pio.clr15_0));
115 printf("pioclr31_16 is 0x%x\n", val(mmcr, pio.clr31_16));
117 printf("swtmrmilli is 0x%x\n", val(mmcr, swtmr.swtmrmilli));
118 printf("swtmrmicro is 0x%x\n", val(mmcr, swtmr.swtmrmicro));
119 printf("swtmrcfg is 0x%x\n", val(mmcr, swtmr.swtmrcfg));
121 printf("status is 0x%x\n", val(mmcr, gptimers.status));
122 printf("pad is 0x%x\n", val(mmcr, gptimers.pad));
124 printf("timers[0].ctl is 0x%x\n", val(mmcr, gptimers.timer[0].ctl));
125 printf("timers[0].cnt is 0x%x\n", val(mmcr, gptimers.timer[0].cnt));
126 printf("timers[0].maxcmpa is 0x%x\n", val(mmcr, gptimers.timer[0].maxcmpa));
127 printf("timers[0].maxcmpb is 0x%x\n", val(mmcr, gptimers.timer[0].maxcmpb));
129 printf("timers[1].ctl is 0x%x\n", val(mmcr, gptimers.timer[1].ctl));
130 printf("timers[1].cnt is 0x%x\n", val(mmcr, gptimers.timer[1].cnt));
131 printf("timers[1].maxcmpa is 0x%x\n", val(mmcr, gptimers.timer[1].maxcmpa));
132 printf("timers[1].maxcmpb is 0x%x\n", val(mmcr, gptimers.timer[1].maxcmpb));
133 printf("timers[2].ctl is 0x%x\n", val(mmcr, gptimers.ctl2));
134 printf("timers[2].cnt is 0x%x\n", val(mmcr, gptimers.cnt2));
135 printf("timers[2].maxcmpa is 0x%x\n", val(mmcr, gptimers.maxcmpa2));
137 printf("ctl is 0x%x\n", val(mmcr, watchdog.ctl));
138 printf("cntll is 0x%x\n", val(mmcr, watchdog.cntll));
139 printf("cntlh is 0x%x\n", val(mmcr, watchdog.cntlh));
141 printf("uart 1 ctl is 0x%x\n", val(mmcr, uarts.uart[0].ctl));
142 printf("uart 1 sta is 0x%x\n", val(mmcr, uarts.uart[0].sta));
143 printf("uart 1 fcrshad is 0x%x\n", val(mmcr, uarts.uart[0].fcrshad));
144 printf("uart 2 ctl is 0x%x\n", val(mmcr, uarts.uart[1].ctl));
145 printf("uart 2 sta is 0x%x\n", val(mmcr, uarts.uart[1].sta));
146 printf("uart 2 fcrshad is 0x%x\n", val(mmcr, uarts.uart[1].fcrshad));
148 printf("ssi ctl is 0x%x\n", val(mmcr, ssi.ctl));
149 printf("ssi xmit is 0x%x\n", val(mmcr, ssi.xmit));
150 printf("ssi cmd is 0x%x\n", val(mmcr, ssi.cmd));
151 printf("ssi sta is 0x%x\n", val(mmcr, ssi.sta));
152 printf("ssi rcv is 0x%x\n", val(mmcr, ssi.rcv));
154 printf("pcicr is 0x%x\n", val(mmcr, pic.pcicr));
155 printf("mpicmode is 0x%x\n", val(mmcr, pic.mpicmode));
156 printf("sl1picmode is 0x%x\n", val(mmcr, pic.sl1picmode));
157 printf("sl2picmode is 0x%x\n", val(mmcr, pic.sl2picmode));
158 printf("swint16_1 is 0x%x\n", val(mmcr, pic.swint16_1));
159 printf("swint22_17 is 0x%x\n", val(mmcr, pic.swint22_17));
160 printf("intpinpol is 0x%x\n", val(mmcr, pic.intpinpol));
161 printf("pichostmap is 0x%x\n", val(mmcr, pic.pichostmap));
162 printf("eccmap is 0x%x\n", val(mmcr, pic.eccmap));
163 printf("gptmr0map is 0x%x\n", val(mmcr, pic.gptmr0map));
164 printf("gptmr1map is 0x%x\n", val(mmcr, pic.gptmr1map));
165 printf("gptmr2map is 0x%x\n", val(mmcr, pic.gptmr2map));
166 printf("pit0map is 0x%x\n", val(mmcr, pic.pit0map));
167 printf("pit1map is 0x%x\n", val(mmcr, pic.pit1map));
168 printf("pit2map is 0x%x\n", val(mmcr, pic.pit2map));
169 printf("uart1map is 0x%x\n", val(mmcr, pic.uart1map));
170 printf("uart2map is 0x%x\n", val(mmcr, pic.uart2map));
171 printf("pciintamap is 0x%x\n", val(mmcr, pic.pciintamap));
172 printf("pciintbmap is 0x%x\n", val(mmcr, pic.pciintbmap));
173 printf("pciintcmap is 0x%x\n", val(mmcr, pic.pciintcmap));
174 printf("pciintdmap is 0x%x\n", val(mmcr, pic.pciintdmap));
175 printf("dmabcintmap is 0x%x\n", val(mmcr, pic.dmabcintmap));
176 printf("ssimap is 0x%x\n", val(mmcr, pic.ssimap));
177 printf("wdtmap is 0x%x\n", val(mmcr, pic.wdtmap));
178 printf("rtcmap is 0x%x\n", val(mmcr, pic.rtcmap));
179 printf("wpvmap is 0x%x\n", val(mmcr, pic.wpvmap));
180 printf("icemap is 0x%x\n", val(mmcr, pic.icemap));
181 printf("ferrmap is 0x%x\n", val(mmcr, pic.ferrmap));
182 printf("gp0imap is 0x%x\n", val(mmcr, pic.gp0imap));
183 printf("gp1imap is 0x%x\n", val(mmcr, pic.gp1imap));
184 printf("gp2imap is 0x%x\n", val(mmcr, pic.gp2imap));
185 printf("gp3imap is 0x%x\n", val(mmcr, pic.gp3imap));
186 printf("gp4imap is 0x%x\n", val(mmcr, pic.gp4imap));
187 printf("gp5imap is 0x%x\n", val(mmcr, pic.gp5imap));
188 printf("gp6imap is 0x%x\n", val(mmcr, pic.gp6imap));
189 printf("gp7imap is 0x%x\n", val(mmcr, pic.gp7imap));
190 printf("gp8imap is 0x%x\n", val(mmcr, pic.gp8imap));
191 printf("gp9imap is 0x%x\n", val(mmcr, pic.gp9imap));
192 printf("gp10imap is 0x%x\n", val(mmcr, pic.gp10imap));
194 printf("sysinfo is 0x%x\n", val(mmcr, reset.sysinfo));
195 printf("rescfg is 0x%x\n", val(mmcr, reset.rescfg));
196 printf("ressta is 0x%x\n", val(mmcr, reset.ressta));
199 printf("ctl is 0x%x\n", val(mmcr, dmacontrol.ctl));
200 printf("mmio is 0x%x\n", val(mmcr, dmacontrol.mmio));
201 printf("extchanmapa is 0x%x\n", val(mmcr, dmacontrol.extchanmapa));
202 printf("extchanmapb is 0x%x\n", val(mmcr, dmacontrol.extchanmapb));
203 printf("extpg0 is 0x%x\n", val(mmcr, dmacontrol.extpg0));
204 printf("extpg1 is 0x%x\n", val(mmcr, dmacontrol.extpg1));
205 printf("extpg2 is 0x%x\n", val(mmcr, dmacontrol.extpg2));
206 printf("extpg3 is 0x%x\n", val(mmcr, dmacontrol.extpg3));
207 printf("extpg5 is 0x%x\n", val(mmcr, dmacontrol.extpg5));
208 printf("extpg6 is 0x%x\n", val(mmcr, dmacontrol.extpg6));
209 printf("extpg7 is 0x%x\n", val(mmcr, dmacontrol.extpg7));
210 printf("exttc3 is 0x%x\n", val(mmcr, dmacontrol.exttc3));
211 printf("exttc5 is 0x%x\n", val(mmcr, dmacontrol.exttc5));
212 printf("exttc6 is 0x%x\n", val(mmcr, dmacontrol.exttc6));
213 printf("exttc7 is 0x%x\n", val(mmcr, dmacontrol.exttc7));
214 printf("bcctl is 0x%x\n", val(mmcr, dmacontrol.bcctl));
215 printf("bcsta is 0x%x\n", val(mmcr, dmacontrol.bcsta));
216 printf("bsintenb is 0x%x\n", val(mmcr, dmacontrol.bsintenb));
217 printf("bcval is 0x%x\n", val(mmcr, dmacontrol.bcval));
218 printf("nxtaddl3 is 0x%x\n", val(mmcr, dmacontrol.nxtaddl3));
219 printf("nxtaddh3 is 0x%x\n", val(mmcr, dmacontrol.nxtaddh3));
220 printf("nxtaddl5 is 0x%x\n", val(mmcr, dmacontrol.nxtaddl5));
221 printf("nxtaddh5 is 0x%x\n", val(mmcr, dmacontrol.nxtaddh5));
222 printf("nxtaddl6 is 0x%x\n", val(mmcr, dmacontrol.nxtaddl6));
223 printf("nxtaddh6 is 0x%x\n", val(mmcr, dmacontrol.nxtaddh6));
224 printf("nxtaddl7 is 0x%x\n", val(mmcr, dmacontrol.nxtaddl7));
225 printf("nxtaddh7 is 0x%x\n", val(mmcr, dmacontrol.nxtaddh7));
226 printf("nxtttcl3 is 0x%x\n", val(mmcr, dmacontrol.nxtttcl3));
227 printf("nxtttch3 is 0x%x\n", val(mmcr, dmacontrol.nxtttch3));
228 printf("nxtttcl5 is 0x%x\n", val(mmcr, dmacontrol.nxtttcl5));
229 printf("nxtttch5 is 0x%x\n", val(mmcr, dmacontrol.nxtttch5));
230 printf("nxtttcl6 is 0x%x\n", val(mmcr, dmacontrol.nxtttcl6));
231 printf("nxtttch6 is 0x%x\n", val(mmcr, dmacontrol.nxtttch6));
232 printf("nxtttcl7 is 0x%x\n", val(mmcr, dmacontrol.nxtttcl7));
233 printf("nxtttch7 is 0x%x\n", val(mmcr, dmacontrol.nxtttch7));
235 return 0;
238 int map_mmcr(void)
240 int fd_mem;
241 volatile uint8_t *mmcr;
242 unsigned long size=4096;
244 if ((fd_mem = open("/dev/mem", O_RDWR)) < 0) {
245 perror("Can not open /dev/mem");
246 exit(1);
249 if (getpagesize() > size) {
250 size = getpagesize();
253 mmcr = mmap(0, size, PROT_WRITE | PROT_READ, MAP_SHARED,
254 fd_mem, (off_t) (0xFFFEF000));
256 if (mmcr == MAP_FAILED) {
257 perror("Error MMAP /dev/mem");
258 exit(1);
262 print_mmcr((struct mmcr *)mmcr);
263 #if 0
265 printf("ElanSC520 uC Rev. ID : %04x\n",*(uint16_t *)mmcr);
266 printf("Am5x86 CPU Control : %04x\n",*(uint16_t *)(mmcr+2));
267 printf("\n");
268 printf("SDRAM Control : %04x\n",*(uint16_t *)(mmcr+0x10));
269 printf("SDRAM Timing Control : %04x\n",*(uint16_t *)(mmcr+0x12));
270 printf("SDRAM Bank Config : %04x\n",*(uint16_t *)(mmcr+0x14));
271 printf("SDRAM Bank 0-3 Ending : %04x\n",*(uint16_t *)(mmcr+0x18));
272 printf("ECC Control : %04x\n",*(uint16_t *)(mmcr+0x20));
273 printf("ECC Status : %04x\n",*(uint16_t *)(mmcr+0x21));
274 printf("ECC Check Bit Position: %04x\n",*(uint16_t *)(mmcr+0x22));
275 printf("ECC Check Code Test : %04x\n",*(uint16_t *)(mmcr+0x23));
276 printf("ECC Single Bit ErrAddr: %04x\n",*(uint16_t *)(mmcr+0x24));
277 printf("ECC Multi Bit ErrAddr : %04x\n",*(uint16_t *)(mmcr+0x28));
278 printf("\n");
279 printf("SDRAM Buffer Control : %04x\n",*(uint16_t *)(mmcr+0x40));
280 printf("\n");
281 printf("BOOTCS Control : %04x\n",*(uint16_t *)(mmcr+0x50));
282 printf("BOOTCS1 Control : %04x\n",*(uint16_t *)(mmcr+0x54));
283 printf("BOOTCS2 Control : %04x\n",*(uint16_t *)(mmcr+0x56));
284 printf("\n");
286 printf("Adr Decode Control : %02x\n",*(uint8_t *)(mmcr+0x80));
287 printf("WrProt Violation Stat.: %04x\n",*(uint16_t *)(mmcr+0x82));
288 printf("PAR 0 : %08x\n",*(uint32_t *)(mmcr+0x88));
289 printf("PAR 1 : %08x\n",*(uint32_t *)(mmcr+0x8C));
290 printf("PAR 2 : %08x\n",*(uint32_t *)(mmcr+0x90));
291 printf("PAR 3 : %08x\n",*(uint32_t *)(mmcr+0x94));
292 printf("PAR 4 : %08x\n",*(uint32_t *)(mmcr+0x98));
293 printf("PAR 5 : %08x\n",*(uint32_t *)(mmcr+0x9C));
294 printf("PAR 6 : %08x\n",*(uint32_t *)(mmcr+0xA0));
295 printf("PAR 7 : %08x\n",*(uint32_t *)(mmcr+0xA4));
296 printf("PAR 8 : %08x\n",*(uint32_t *)(mmcr+0xA8));
297 printf("PAR 9 : %08x\n",*(uint32_t *)(mmcr+0xAC));
298 printf("PAR 10 : %08x\n",*(uint32_t *)(mmcr+0xB0));
299 printf("PAR 11 : %08x\n",*(uint32_t *)(mmcr+0xB4));
300 printf("PAR 12 : %08x\n",*(uint32_t *)(mmcr+0xB8));
301 printf("PAR 13 : %08x\n",*(uint32_t *)(mmcr+0xBC));
302 printf("PAR 14 : %08x\n",*(uint32_t *)(mmcr+0xC0));
303 printf("PAR 15 : %08x\n",*(uint32_t *)(mmcr+0xC4));
304 #endif
305 munmap((void *) mmcr, size);
306 return 0;
309 int main(int argc, char *argv[])
311 map_mmcr();
312 return 0;