src/lib/uart8250.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2003 Eric Biederman
   5  * Copyright (C) 2006-2010 coresystems GmbH
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19  */
  20
  21 #include <arch/io.h>
  22 #include <uart8250.h>
  23 #include <pc80/mc146818rtc.h>
  24 #if CONFIG_USE_OPTION_TABLE
  25 #include "option_table.h"
  26 #endif
  27
  28
  29 /* Should support 8250, 16450, 16550, 16550A type UARTs */
  30
  31 static inline int uart8250_can_tx_byte(unsigned base_port)
  32 {
  33         return inb(base_port + UART_LSR) & UART_MSR_DSR;
  34 }
  35
  36 static inline void uart8250_wait_to_tx_byte(unsigned base_port)
  37 {
  38         while(!uart8250_can_tx_byte(base_port))
  39                 ;
  40 }
  41
  42 static inline void uart8250_wait_until_sent(unsigned base_port)
  43 {
  44         while(!(inb(base_port + UART_LSR) & UART_LSR_TEMT))
  45                 ;
  46 }
  47
  48 void uart8250_tx_byte(unsigned base_port, unsigned char data)
  49 {
  50         uart8250_wait_to_tx_byte(base_port);
  51         outb(data, base_port + UART_TBR);
  52         /* Make certain the data clears the fifos */
  53         uart8250_wait_until_sent(base_port);
  54 }
  55
  56 int uart8250_can_rx_byte(unsigned base_port)
  57 {
  58         return inb(base_port + UART_LSR) & UART_LSR_DR;
  59 }
  60
  61 unsigned char uart8250_rx_byte(unsigned base_port)
  62 {
  63         while(!uart8250_can_rx_byte(base_port))
  64                 ;
  65         return inb(base_port + UART_RBR);
  66 }
  67
  68 void uart8250_init(unsigned base_port, unsigned divisor)
  69 {
  70         /* Disable interrupts */
  71         outb(0x0, base_port + UART_IER);
  72         /* Enable FIFOs */
  73         outb(UART_FCR_FIFO_EN, base_port + UART_FCR);
  74
  75         /* assert DTR and RTS so the other end is happy */
  76         outb(UART_MCR_DTR | UART_MCR_RTS, base_port + UART_MCR);
  77
  78         /* DLAB on */
  79         outb(UART_LCR_DLAB | CONFIG_TTYS0_LCS, base_port + UART_LCR);
  80
  81         /* Set Baud Rate Divisor. 12 ==> 115200 Baud */
  82         outb(divisor & 0xFF,   base_port + UART_DLL);
  83         outb((divisor >> 8) & 0xFF,    base_port + UART_DLM);
  84
  85         /* Set to 3 for 8N1 */
  86         outb(CONFIG_TTYS0_LCS, base_port + UART_LCR);
  87 }
  88
  89 #ifndef __ROMCC__
  90 /* Initialize a generic uart */
  91 void init_uart8250(unsigned base_port, struct uart8250 *uart)
  92 {
  93         int divisor = uart->baud ? (115200/uart->baud) : 1;
  94
  95         if (base_port == CONFIG_TTYS0_BASE) {
  96                 /* Don't reinitialize the console serial port,
  97                  * This is espeically nasty in SMP.
  98                  * NOTE: The first invocation thus always needs to be
  99                  */
 100                 return;
 101         }
 102         uart8250_init(base_port, divisor);
 103 }
 104 #endif
 105
 106 #ifdef __PRE_RAM__
 107 void uart_init(void)
 108 {
 109 #if CONFIG_USE_OPTION_TABLE
 110         static const unsigned char divisor[] = { 1, 2, 3, 6, 12, 24, 48, 96 };
 111         unsigned ttys0_div, ttys0_index;
 112         ttys0_index = read_option(CMOS_VSTART_baud_rate, CMOS_VLEN_baud_rate, 0);
 113         ttys0_index &= 7;
 114         ttys0_div = divisor[ttys0_index];
 115
 116         uart8250_init(CONFIG_TTYS0_BASE, ttys0_div);
 117 #else
 118         uart8250_init(CONFIG_TTYS0_BASE, CONFIG_TTYS0_DIV);
 119 #endif
 120 }
 121 #endif