Final set of smp_write_bus -> mptable_write_buses changes.
[coreboot.git] / src / lib / usbdebug.c
blobc108fa3d3ffdcb1a8bfe2329f59e3b2379c69a98
1 /*
2 * This file is part of the coreboot project.
4 * Copyright (C) 2006 Eric Biederman (ebiederm@xmission.com)
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
20 #if !defined(__ROMCC__)
21 #include <console/console.h>
22 #else
23 #if CONFIG_CACHE_AS_RAM==0
24 #define printk(BIOS_DEBUG, fmt, arg...) do {} while(0)
25 #endif
26 #endif
28 #include <arch/io.h>
30 #include <usb_ch9.h>
31 #include <ehci.h>
32 #include <usbdebug.h>
34 #define USB_DEBUG_DEVNUM 127
36 #define DBGP_DATA_TOGGLE 0x8800
37 #define DBGP_PID_UPDATE(x, tok) \
38 ((((x) ^ DBGP_DATA_TOGGLE) & 0xffff00) | ((tok) & 0xff))
40 #define DBGP_LEN_UPDATE(x, len) (((x) & ~0x0f) | ((len) & 0x0f))
42 * USB Packet IDs (PIDs)
45 /* token */
46 #define USB_PID_OUT 0xe1
47 #define USB_PID_IN 0x69
48 #define USB_PID_SOF 0xa5
49 #define USB_PID_SETUP 0x2d
50 /* handshake */
51 #define USB_PID_ACK 0xd2
52 #define USB_PID_NAK 0x5a
53 #define USB_PID_STALL 0x1e
54 #define USB_PID_NYET 0x96
55 /* data */
56 #define USB_PID_DATA0 0xc3
57 #define USB_PID_DATA1 0x4b
58 #define USB_PID_DATA2 0x87
59 #define USB_PID_MDATA 0x0f
60 /* Special */
61 #define USB_PID_PREAMBLE 0x3c
62 #define USB_PID_ERR 0x3c
63 #define USB_PID_SPLIT 0x78
64 #define USB_PID_PING 0xb4
65 #define USB_PID_UNDEF_0 0xf0
67 #define USB_PID_DATA_TOGGLE 0x88
68 #define DBGP_CLAIM (DBGP_OWNER | DBGP_ENABLED | DBGP_INUSE)
70 #define PCI_CAP_ID_EHCI_DEBUG 0xa
72 #define HUB_ROOT_RESET_TIME 50 /* times are in msec */
73 #define HUB_SHORT_RESET_TIME 10
74 #define HUB_LONG_RESET_TIME 200
75 #define HUB_RESET_TIMEOUT 500
77 #define DBGP_MAX_PACKET 8
79 static int dbgp_wait_until_complete(struct ehci_dbg_port *ehci_debug)
81 unsigned ctrl;
82 int loop = 0x100000;
83 do {
84 ctrl = read32((unsigned long)&ehci_debug->control);
85 /* Stop when the transaction is finished */
86 if (ctrl & DBGP_DONE)
87 break;
88 } while(--loop>0);
90 if (!loop) return -1000;
92 /* Now that we have observed the completed transaction,
93 * clear the done bit.
95 write32((unsigned long)&ehci_debug->control, ctrl | DBGP_DONE);
96 return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl);
99 static void dbgp_mdelay(int ms)
101 int i;
102 while (ms--) {
103 for (i = 0; i < 1000; i++)
104 inb(0x80);
108 static void dbgp_breath(void)
110 /* Sleep to give the debug port a chance to breathe */
113 static int dbgp_wait_until_done(struct ehci_dbg_port *ehci_debug, unsigned ctrl)
115 unsigned pids, lpid;
116 int ret;
118 int loop = 3;
119 retry:
120 write32((unsigned long)&ehci_debug->control, ctrl | DBGP_GO);
121 ret = dbgp_wait_until_complete(ehci_debug);
122 pids = read32((unsigned long)&ehci_debug->pids);
123 lpid = DBGP_PID_GET(pids);
125 if (ret < 0)
126 return ret;
128 /* If the port is getting full or it has dropped data
129 * start pacing ourselves, not necessary but it's friendly.
131 if ((lpid == USB_PID_NAK) || (lpid == USB_PID_NYET))
132 dbgp_breath();
134 /* If I get a NACK reissue the transmission */
135 if (lpid == USB_PID_NAK) {
136 if (--loop > 0) goto retry;
139 return ret;
142 static void dbgp_set_data(struct ehci_dbg_port *ehci_debug, const void *buf, int size)
144 const unsigned char *bytes = buf;
145 unsigned lo, hi;
146 int i;
147 lo = hi = 0;
148 for (i = 0; i < 4 && i < size; i++)
149 lo |= bytes[i] << (8*i);
150 for (; i < 8 && i < size; i++)
151 hi |= bytes[i] << (8*(i - 4));
152 write32((unsigned long)&ehci_debug->data03, lo);
153 write32((unsigned long)&ehci_debug->data47, hi);
156 static void dbgp_get_data(struct ehci_dbg_port *ehci_debug, void *buf, int size)
158 unsigned char *bytes = buf;
159 unsigned lo, hi;
160 int i;
161 lo = read32((unsigned long)&ehci_debug->data03);
162 hi = read32((unsigned long)&ehci_debug->data47);
163 for (i = 0; i < 4 && i < size; i++)
164 bytes[i] = (lo >> (8*i)) & 0xff;
165 for (; i < 8 && i < size; i++)
166 bytes[i] = (hi >> (8*(i - 4))) & 0xff;
169 static int dbgp_bulk_write(struct ehci_dbg_port *ehci_debug, unsigned devnum, unsigned endpoint, const char *bytes, int size)
171 unsigned pids, addr, ctrl;
172 int ret;
173 if (size > DBGP_MAX_PACKET)
174 return -1;
176 addr = DBGP_EPADDR(devnum, endpoint);
178 pids = read32((unsigned long)&ehci_debug->pids);
179 pids = DBGP_PID_UPDATE(pids, USB_PID_OUT);
181 ctrl = read32((unsigned long)&ehci_debug->control);
182 ctrl = DBGP_LEN_UPDATE(ctrl, size);
183 ctrl |= DBGP_OUT;
184 ctrl |= DBGP_GO;
186 dbgp_set_data(ehci_debug, bytes, size);
187 write32((unsigned long)&ehci_debug->address, addr);
188 write32((unsigned long)&ehci_debug->pids, pids);
190 ret = dbgp_wait_until_done(ehci_debug, ctrl);
191 if (ret < 0) {
192 return ret;
194 return ret;
197 int dbgp_bulk_write_x(struct ehci_debug_info *dbg_info, const char *bytes, int size)
199 return dbgp_bulk_write(dbg_info->ehci_debug, dbg_info->devnum, dbg_info->endpoint_out, bytes, size);
202 static int dbgp_bulk_read(struct ehci_dbg_port *ehci_debug, unsigned devnum, unsigned endpoint, void *data, int size)
204 unsigned pids, addr, ctrl;
205 int ret;
207 if (size > DBGP_MAX_PACKET)
208 return -1;
210 addr = DBGP_EPADDR(devnum, endpoint);
212 pids = read32((unsigned long)&ehci_debug->pids);
213 pids = DBGP_PID_UPDATE(pids, USB_PID_IN);
215 ctrl = read32((unsigned long)&ehci_debug->control);
216 ctrl = DBGP_LEN_UPDATE(ctrl, size);
217 ctrl &= ~DBGP_OUT;
218 ctrl |= DBGP_GO;
220 write32((unsigned long)&ehci_debug->address, addr);
221 write32((unsigned long)&ehci_debug->pids, pids);
222 ret = dbgp_wait_until_done(ehci_debug, ctrl);
223 if (ret < 0)
224 return ret;
225 if (size > ret)
226 size = ret;
227 dbgp_get_data(ehci_debug, data, size);
228 return ret;
230 int dbgp_bulk_read_x(struct ehci_debug_info *dbg_info, void *data, int size)
232 return dbgp_bulk_read(dbg_info->ehci_debug, dbg_info->devnum, dbg_info->endpoint_in, data, size);
235 int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, int requesttype, int request,
236 int value, int index, void *data, int size)
238 unsigned pids, addr, ctrl;
239 struct usb_ctrlrequest req;
240 int read;
241 int ret;
243 read = (requesttype & USB_DIR_IN) != 0;
244 if (size > (read?DBGP_MAX_PACKET:0))
245 return -1;
247 /* Compute the control message */
248 req.bRequestType = requesttype;
249 req.bRequest = request;
250 req.wValue = value;
251 req.wIndex = index;
252 req.wLength = size;
254 pids = DBGP_PID_SET(USB_PID_DATA0, USB_PID_SETUP);
255 addr = DBGP_EPADDR(devnum, 0);
257 ctrl = read32((unsigned long)&ehci_debug->control);
258 ctrl = DBGP_LEN_UPDATE(ctrl, sizeof(req));
259 ctrl |= DBGP_OUT;
260 ctrl |= DBGP_GO;
262 /* Send the setup message */
263 dbgp_set_data(ehci_debug, &req, sizeof(req));
264 write32((unsigned long)&ehci_debug->address, addr);
265 write32((unsigned long)&ehci_debug->pids, pids);
266 ret = dbgp_wait_until_done(ehci_debug, ctrl);
267 if (ret < 0)
268 return ret;
271 /* Read the result */
272 ret = dbgp_bulk_read(ehci_debug, devnum, 0, data, size);
273 return ret;
276 static int ehci_reset_port(struct ehci_regs *ehci_regs, int port)
278 unsigned portsc;
279 unsigned delay_time, delay_ms;
280 int loop;
282 /* Reset the usb debug port */
283 portsc = read32((unsigned long)&ehci_regs->port_status[port - 1]);
284 portsc &= ~PORT_PE;
285 portsc |= PORT_RESET;
286 write32((unsigned long)&ehci_regs->port_status[port - 1], portsc);
288 delay_ms = HUB_ROOT_RESET_TIME;
289 for (delay_time = 0; delay_time < HUB_RESET_TIMEOUT;
290 delay_time += delay_ms) {
291 dbgp_mdelay(delay_ms);
293 portsc = read32((unsigned long)&ehci_regs->port_status[port - 1]);
294 if (portsc & PORT_RESET) {
295 /* force reset to complete */
296 loop = 2;
297 write32((unsigned long)&ehci_regs->port_status[port - 1],
298 portsc & ~(PORT_RWC_BITS | PORT_RESET));
299 do {
300 dbgp_mdelay(delay_ms);
301 portsc = read32((unsigned long)&ehci_regs->port_status[port - 1]);
302 delay_time += delay_ms;
303 } while ((portsc & PORT_RESET) && (--loop > 0));
304 if (!loop) {
305 printk(BIOS_DEBUG, "ehci_reset_port forced done");
309 /* Device went away? */
310 if (!(portsc & PORT_CONNECT))
311 return -107;//-ENOTCONN;
313 /* bomb out completely if something weird happend */
314 if ((portsc & PORT_CSC))
315 return -22;//-EINVAL;
317 /* If we've finished resetting, then break out of the loop */
318 if (!(portsc & PORT_RESET) && (portsc & PORT_PE))
319 return 0;
321 return -16;//-EBUSY;
324 int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port)
326 unsigned status;
327 int ret, reps;
328 for (reps = 0; reps < 3; reps++) {
329 dbgp_mdelay(100);
330 status = read32((unsigned long)&ehci_regs->status);
331 if (status & STS_PCD) {
332 ret = ehci_reset_port(ehci_regs, port);
333 if (ret == 0)
334 return 0;
337 return -107; //-ENOTCONN;
341 #define DBGP_DEBUG 1
342 #if DBGP_DEBUG
343 # define dbgp_printk(fmt_arg...) printk(BIOS_DEBUG, fmt_arg)
344 #else
345 #define dbgp_printk(fmt_arg...) do {} while(0)
346 #endif
348 #ifdef __PRE_RAM__
349 static void usbdebug_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info)
351 struct ehci_caps *ehci_caps;
352 struct ehci_regs *ehci_regs;
353 struct ehci_dbg_port *ehci_debug;
354 unsigned dbgp_endpoint_out;
355 unsigned dbgp_endpoint_in;
356 struct usb_debug_descriptor dbgp_desc;
357 unsigned ctrl, devnum;
358 int ret;
359 int loop;
361 unsigned cmd, status, portsc, hcs_params, debug_port, n_ports, new_debug_port;
362 int i;
363 unsigned port_map_tried;
365 unsigned playtimes = 3;
367 ehci_caps = (struct ehci_caps *)ehci_bar;
368 ehci_regs = (struct ehci_regs *)(ehci_bar + HC_LENGTH(read32((unsigned long)&ehci_caps->hc_capbase)));
369 ehci_debug = (struct ehci_dbg_port *)(ehci_bar + offset);
371 info->ehci_debug = (void *)0;
373 new_debug_port = 0;
375 try_next_time:
376 port_map_tried = 0;
378 try_next_port:
379 hcs_params = read32((unsigned long)&ehci_caps->hcs_params);
380 debug_port = HCS_DEBUG_PORT(hcs_params);
381 n_ports = HCS_N_PORTS(hcs_params);
383 dbgp_printk("ehci_bar: 0x%x\n", ehci_bar);
384 dbgp_printk("debug_port: %d\n", debug_port);
385 dbgp_printk("n_ports: %d\n", n_ports);
387 #if 1
388 for (i = 1; i <= n_ports; i++) {
389 portsc = read32((unsigned long)&ehci_regs->port_status[i-1]);
390 dbgp_printk("PORTSC #%d: %08x\n", i, portsc);
392 #endif
394 if(port_map_tried && (new_debug_port!=debug_port)) {
395 if(--playtimes) {
396 set_debug_port(debug_port);
397 goto try_next_time;
399 return;
402 /* Reset the EHCI controller */
403 loop = 10;
404 cmd = read32((unsigned long)&ehci_regs->command);
405 cmd |= CMD_RESET;
406 write32((unsigned long)&ehci_regs->command, cmd);
407 do {
408 cmd = read32((unsigned long)&ehci_regs->command);
409 } while ((cmd & CMD_RESET) && (--loop > 0));
411 if(!loop)
412 dbgp_printk("Could not reset EHCI controller.\n");
413 else
414 dbgp_printk("EHCI controller reset successfully.\n");
416 /* Claim ownership, but do not enable yet */
417 ctrl = read32((unsigned long)&ehci_debug->control);
418 ctrl |= DBGP_OWNER;
419 ctrl &= ~(DBGP_ENABLED | DBGP_INUSE);
420 write32((unsigned long)&ehci_debug->control, ctrl);
422 /* Start the ehci running */
423 cmd = read32((unsigned long)&ehci_regs->command);
424 cmd &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | CMD_ASE | CMD_RESET);
425 cmd |= CMD_RUN;
426 write32((unsigned long)&ehci_regs->command, cmd);
428 /* Ensure everything is routed to the EHCI */
429 write32((unsigned long)&ehci_regs->configured_flag, FLAG_CF);
431 /* Wait until the controller is no longer halted */
432 loop = 10;
433 do {
434 status = read32((unsigned long)&ehci_regs->status);
435 } while ((status & STS_HALT) && (--loop>0));
437 if(!loop) {
438 dbgp_printk("EHCI could not be started.\n");
439 return;
441 dbgp_printk("EHCI started.\n");
443 /* Wait for a device to show up in the debug port */
444 ret = ehci_wait_for_port(ehci_regs, debug_port);
445 if (ret < 0) {
446 dbgp_printk("No device found in debug port %d\n", debug_port);
447 goto next_debug_port;
449 dbgp_printk("EHCI done waiting for port.\n");
451 /* Enable the debug port */
452 ctrl = read32((unsigned long)&ehci_debug->control);
453 ctrl |= DBGP_CLAIM;
454 write32((unsigned long)&ehci_debug->control, ctrl);
455 ctrl = read32((unsigned long)&ehci_debug->control);
456 if ((ctrl & DBGP_CLAIM) != DBGP_CLAIM) {
457 dbgp_printk("No device in EHCI debug port.\n");
458 write32((unsigned long)&ehci_debug->control, ctrl & ~DBGP_CLAIM);
459 goto err;
461 dbgp_printk("EHCI debug port enabled.\n");
463 /* Completely transfer the debug device to the debug controller */
464 portsc = read32((unsigned long)&ehci_regs->port_status[debug_port - 1]);
465 portsc &= ~PORT_PE;
466 write32((unsigned long)&ehci_regs->port_status[debug_port - 1], portsc);
468 dbgp_mdelay(100);
470 /* Find the debug device and make it device number 127 */
471 for (devnum = 0; devnum <= 127; devnum++) {
472 ret = dbgp_control_msg(ehci_debug, devnum,
473 USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
474 USB_REQ_GET_DESCRIPTOR, (USB_DT_DEBUG << 8), 0,
475 &dbgp_desc, sizeof(dbgp_desc));
476 if (ret > 0)
477 break;
479 if (devnum > 127) {
480 dbgp_printk("Could not find attached debug device.\n");
481 goto err;
483 if (ret < 0) {
484 dbgp_printk("Attached device is not a debug device.\n");
485 goto err;
487 dbgp_endpoint_out = dbgp_desc.bDebugOutEndpoint;
488 dbgp_endpoint_in = dbgp_desc.bDebugInEndpoint;
490 /* Move the device to 127 if it isn't already there */
491 if (devnum != USB_DEBUG_DEVNUM) {
492 ret = dbgp_control_msg(ehci_debug, devnum,
493 USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
494 USB_REQ_SET_ADDRESS, USB_DEBUG_DEVNUM, 0, (void *)0, 0);
495 if (ret < 0) {
496 dbgp_printk("Could not move attached device to %d.\n",
497 USB_DEBUG_DEVNUM);
498 goto err;
500 devnum = USB_DEBUG_DEVNUM;
501 dbgp_printk("EHCI debug device renamed to 127.\n");
504 /* Enable the debug interface */
505 ret = dbgp_control_msg(ehci_debug, USB_DEBUG_DEVNUM,
506 USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
507 USB_REQ_SET_FEATURE, USB_DEVICE_DEBUG_MODE, 0, (void *)0, 0);
508 if (ret < 0) {
509 dbgp_printk("Could not enable EHCI debug device.\n");
510 goto err;
512 dbgp_printk("EHCI debug interface enabled.\n");
514 /* Perform a small write to get the even/odd data state in sync
516 ret = dbgp_bulk_write(ehci_debug, USB_DEBUG_DEVNUM, dbgp_endpoint_out, " ",1);
517 if (ret < 0) {
518 dbgp_printk("dbgp_bulk_write failed: %d\n", ret);
519 goto err;
521 dbgp_printk("Test write done\n");
523 info->ehci_caps = ehci_caps;
524 info->ehci_regs = ehci_regs;
525 info->ehci_debug = ehci_debug;
526 info->devnum = devnum;
527 info->endpoint_out = dbgp_endpoint_out;
528 info->endpoint_in = dbgp_endpoint_in;
530 return;
531 err:
532 /* Things didn't work so remove my claim */
533 ctrl = read32((unsigned long)&ehci_debug->control);
534 ctrl &= ~(DBGP_CLAIM | DBGP_OUT);
535 write32((unsigned long)(unsigned long)&ehci_debug->control, ctrl);
537 next_debug_port:
538 port_map_tried |= (1<<(debug_port-1));
539 if(port_map_tried != ((1<<n_ports) -1)) {
540 new_debug_port = ((debug_port-1+1)%n_ports) + 1;
541 set_debug_port(new_debug_port);
542 goto try_next_port;
544 if(--playtimes) {
545 set_debug_port(debug_port);
546 goto try_next_time;
550 #endif